Design Ideas: March 3, 1994
The notebook-computer supply in Fig 1 powers the 5V logic and derives an adjustable -24V supply for an LCD's backplane. The design uses only a high-efficiency buck regulator (Si9150) and an NMOS/PMOS, dual-power-FET chip set (Si9943), eliminating the extra parts required when you implement both supplies independently. Because of the low on-resistances of the dual FETs, this circuit can achieve better than 92% efficiency at 7.2V input and full-load output (7.6W).
The 5V supply is a buck regulator; that is, it takes an input voltage of 6 to 12V dc from 6 NiCd cells and steps it down to 5V at up to 1.5A.
A simple circuit fact underlies the adjustable -24V bias supply. That is, when the PMOS device is off and the NMOS device is on, the voltage across the inductor is the output voltage (5V) plus the NMOS FET's voltage drop. This voltage is constant and is at least first-order independent of the line-input voltage.
A second winding added to the main output's inductor can use this voltage, via a properly selected turns ratio, to charge the -24V bulk capacitor to approximately -28V. An LM337L regulator and some resistors implement the adjustable bias supply. By adjusting the contrast control, users can vary the -24V supply from -12 to -25V at up to 10 or so milliamps.
Pulling the shutdown control low places the converter in a low-power (less than 450 µA) sleep mode, and the supply can fully power up again in less than 60 msec. The sleep mode shuts down the power FETs while leaving the Si9150's internal CMOS circuitry active for fast power-up.
Because the 5V output consumes almost all of the power, you should size the 5V winding to use most of the available winding area. This constraint leads to a winding configuration of