Precision A/D converters need a window comparator. The window comparator in Fig 1a is synchronized to the clock signal. This synchronization eliminates errors that could arise when the input signal crosses the high or low threshold (Fig 1b) unsynchronized to clock.
In operation, comparator IC1A sets flip-flop IC2A high when the input signal rises above the high threshold. Inverting comparator IC1B sets flip-flop IC2A low when the input signal descends past the low threshold. The second flip-flop, IC2B, synchronizes the first flip-flop's output to the rising edge of the clock signal. Obviously, the clock signal must be significantly higher in frequency than the input signal to avoid problems with metastability.
The values for R2/R3 and R4/R5 determine the hysteresis for the comparators. Customary values for R2 and R3 are 10 k(ohm) and 1 M(ohm) for R4 and R5. Reference-voltage V1, R1, and R2 determine this high threshold. Similarly, reference-voltage V2, R6, and R7 set the low threshold. (DI #1693)
