Design Ideas: December 7, 1995

There are 11 interrupt-request (IRQ) lines and seven DMA-request (DMQ) lines available on an ISA connector. These lines are IRQ3, 4, 5, 6, 7, 9, 10, 11, 12, 14, and 15 and DRQ0, 1, 2, 3, 5, 6, and 7. For diagnostic purposes, you should equip each line with its own control circuit to set each output low, high, or in tristate mode to avoid conflicts with installed add-on boards.

Full-flavor versions of such circuitry call for an 18-bit register with individual output enables that another 18-bit register controls. These requirements translate to at least four GAL-type ICs. However, unless you investigate subtle request interactions, you can check interrupts and DMA channels sequentially instead of driving all lines in parallel. Thus, you don't need to latch all requests and all output enables; one data bit and an 18-way selector with a tristate output is sufficient.

The circuit in Figure 1 implements such a low-cost and simplified IRQ/DRQ tester. The PLD decodes the system-bus operations and controls two analog multiplexers, IC₂ and IC₃, operating as demultiplexers. By sending outputs to predefined I/O locations, you can set a selected line low or high or turn off all outputs. Although analog multiplexers are rather unusual components for interfacing to a computer bus, they feature smaller footprints and are half the price of candidate PLDs. Suitable device types for IC₁ are GAL20V8 and equivalents. You can download the CUPL files for the PLD described here via the EDN BBS: access EDN BBS /DI_SIG #1796. (DI #1796)