The power-supply circuit in Figure 1 tracks a control input whenever the input is between 5 and 5.7V, maintains a minimum output voltage of 5V whenever the control input is less than or equal to 5V, maintains a maximum output voltage of 5.7V whenever the control input is greater than or equal to 5.7V, and implements foldback current limiting such that IKNEE is approximately equal to 700 mA and ISC is approximately 0 mA.
To fulfill these requirements, the circuit uses a combination of op-amp "high-" and "low-win" circuits. The winner of a high-win circuit is the amplifier with the highest output. Similarly, the winner of a low-win circuit is the amplifier with the lowest output. The circuit must maintain good precision. The circuit configures both IC1A and IC1B as unity-gain amplifiers in a high-win circuit. The winner is then part of a low-win configuration with IC2A and IC2B as the other contestants.
Suppose that the control input is less than 5V and that the output is not overloaded. Then IC1B "wins," and the output follows the input to IC1B, which is 5V in this example. As the control exceeds IC1B’s input, IC1A takes over, and the output voltage follows IC1A’s input. As the control input further increases beyond the input to IC1B, IC2B takes over, and the output remains at 5.7V. If the voltage at the top of RSC tries to exceed the threshold set by R1 and R2, the output of IC2A reverses polarity and is now the winner, greatly reducing the drive to Q1. (DI#1806)