The double-ladder DAC in Figure 1 suits ASIC or hybrid designs that require multiple DACs sharing an analog input but with different digital inputs and multiple analog outputs. The circuit is a modification of the standard R-2R resistive ladder in a CMOS multiplying DAC. The two DAC sections in Figure 1 share the longitudinal resistors and split the latitudinal resistors in the ladder. A possible name for this approach is an "R-4R" multiplying DAC (MDAC).

This circuit reduces the number of printed thick/thin film resistors, related trim procedures, and pin numbers in a package. The R-4R technique applies to DAC designs with any number of phases. For example, you can design a three-phase DAC using an R-6R topology. You can also use unequal latitudinal resistors, such as the combination of R-3R and -6R in a two-phase DAC, or different-valued feedback resistors (R_FB1 and R_FB2) to produce scale factors.

Multiphase DACs are useful in a variety of applications, such as coordinate conversions, audio- and video-signal splitting, and error correction. In polar-to-Cartesian conversion, assume that one input voltage is proportional to the vector’s length, and two digital inputs are proportional to the sine/cosine of the polar angle. The two output voltages are then proportional to the vertical/horizontal coordinates, respectively. For error correction, you can connect one digital input to a look-up table and use the second input for the main digital input. In this case, you would tie the two current outputs of the multiphase DAC together. (DI #1810)