EDN -- 03.28.96 Active filter has wideband tuning range

Design Ideas: March 28, 1996

Active filter has wideband tuning range

Rea Schmid,
National Semiconductor, Comlinear Products Group, Fort Collins, CO

You can use the basic building block of Figure 1and high-speed analog components to build a second-order lowpass variable-frequency filter with excellent phase linearity (Figure 2). Figure 1’s filter section includes a Miller integrator followed by a variable-gain amplifier with overall feedback resistor R₂. The overall dc gain is the ratio of R₂ to R₁. This circuit has a transfer function of

The -3-dB cutoff frequency is where s=j[smlomega]=j2[pi]f.

For the overall filter stage to achieve high bandwidth, you need to use extremely high-bandwidth parts for each amplifier. For example, to achieve an overall -3-dB bandwidth of 50 MHz requires using parts such as the CLC522 variable-gain amplifier and the CLC420 voltage-feedback amplifier. The CLC522 has a bandwidth of 330 MHz at a gain of 2, and the CLC420 has a unity-gain bandwidth of 300 MHz.

Figure 2a shows a second-order filter using these same amplifiers. Each variable-gain amplifier (IC₂ and IC₄) takes a voltage input and produces a scaled output-voltage gain. External resistors R_G and R_F set the maximum gain. The external control voltage, V_G, controls the amount of attenuation. The output voltage is

where I_RG is the current through R_G. You can use the typical current I_RG to calculate R_G as R_G=V_IN/I_RG, where V_IN is the peak voltage, and I_RG is typically 1.8 mA. The maximum V_INand maximum gain determine the frequency response of IC₂ and IC₄. The Miller integrator attenuates the signal level over the frequency range. Therefore, the maximum input voltage of the variable-gain amplifier must meet the amplitude of the preceding integrator’s frequency and voltage output.

Figure 2a’s design sets the cutoff frequency of each integrator at a low enough frequency to match the input voltage range for IC₂ and IC₄. The -3-dB frequency of the first integrator is 2.6 MHz, and the frequency of the second integrator is 1.6 MHz. These choices allow the delay of the second stage’s signal to match the first stage’s frequency response. The second stage’s gain is equal to 2 to account for the gain loss at the 50 Ohms load resistor.

You can use the circuit inFigure 2b to provide a digitally controlled tuning voltage to change the filter’s frequency response. The output of Figure 2b connects to the gain-control pins of IC₁ and IC₂ in Figure 2a. Figure 3a and b show the frequency response and group delay of the filter for various settings of V_G. This level of performance strongly depends on proper layout, resistive terminations, and power-supply decoupling.