Practical Chip Design

- March 21, 2012

Brian Bailey explores how IC design teams work: the struggle for power efficiency and performance, wrestling with semiconductor processes and design methodologies, the challenges of global design teams. How do we somehow herd architecture, IP, design and verification into a successful tape-out?


You can’t fix what you can’t see

  • 08.20.2013

In order to get to the necessary yield levels, the fabs have to understand what is going on in the fabrication process and the things that are causing yields to fall, and of course you can’t fix what you can’t find, and can’t control what you can’t measure...Read More...

Book: Constraining Designs for Synthesis and Timing Analysis

  • 08.12.2013

Book review and excerpt for the book: Constraining Designs for Synthesis and Timing Analysis: A practical guide to Synopsys Design ConstraintsRead More...

Who was the inventor?

  • 07.31.2013

Was Leonardo Da Vinci a great renaissance inventor or just a good engineer who could improve on the ideas of others...Read More...


Fab lite, Design lite

  • 07.23.2013

Is there a major business model change about to hit the semiconductor industry? Maybe we should start talking about design-lite companies...Read More...


Renaming embedded systems

  • 07.09.2013

The definition for embedded systems is highly outdated and needs to be rethought...Read More...


Kathryn Kranen on rational pricing

  • 07.02.2013

The fourth vision talk at DAC this year was by Kathryn Kranen, CEO of Jasper. She talked about innovation but perhaps missed her own...Read More...

DAC Vision from Aart de Geus

  • 06.24.2013

We have reached the tipping point in the 50 year techonomic push-pull cycle. It is no longer just about costs but about value and impact…Read More...

DAC Vision from Cadence’s Lip-Bu Tan

  • 06.18.2013

What can be more exciting than having two major platforms driving the industry, with a third, even larger one, coming right behind...Read More...

DAC Vision from Wally Rhines

  • 06.10.2013

Mentor's Wally Rhines took the stage at DAC and spoke on opportunities in EDA and the coming end of Moore’s Law. When Moore’s Law makes it difficult to cost effectively shrink in the X-Y plane, we grow in the third dimension.Read More...

Requirements automation

  • 05.28.2013

It may be worthwhile to consider using executable specifications and requirements together to add automation to the verification process…Read More...

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