Pulse parameters for high-current testing
The fine folks at test-socket company Johnstech sent me a note about a paper on their website that helps you understand high-current pulsed thermal testing. This is just one paper of many others on their webpage, none of which is hidden behind a registration or pay wall (yeah Johnstech). They have an equally interesting landing page for application notes.
- This SL-VCMA test connector from Johnstech is not cheap, but if you want to buy junk and spend all your time testing the inferior connector instead of the part you are characterizing, go ahead and be miserable.
I got involved with thermal testing when I was an apps engineer at National Semiconductor. I tried to incorporate some of my learning in a thermal design article I did a few years ago. There are a few quick facts you should be aware of. One is that the time-constant of a silicon die is in microseconds. So lets say you pulse a MOSFET and then try to measure its temperature by forward-biasing an ESD or body diode on the chip. You better get that diode temperate fast, since the chip will start cooling off in a few microseconds. This is why I like to characterize the FETs by their on resistance over temperature. When you look at the voltage drop across the fully-on FET, at a known current you measure in real-time, you can back-calculate the FET temperatures at the exact same instant it is carrying the load current. If the FET is in its linear region you can pulse it full-on for a few microseconds and take the reading then.
One of the delights of working at National was having Bob Pease pass by my lab bench every now and then. When he walked by my setup, the scope was showing the voltage drop across an ESD diode, and hence, the temperature declining after an output pulse. Bob took a quick look and pointed out “Look, you can see at least three time constants.” I didn’t get what he was saying. He patiently pointed out that there were three different slopes that the cooling diode exhibited. He said those three time constants represented three of the ways the die was cooling off. The dominant one was the die cooling through the lead frame. That kicked into a slightly different slope that Bob postulated was heat going out the bond wires. A third and more subtle slope change he figured was the heat going out the plastic chip encapsulation. And as I said, all this was happening in microseconds. Silicon is a crystal so the thermal events happen fast. That is why it is easy to lull yourself into thinking a die is isothermal, but nothing is further from the truth. Pease told me that Bob Widlar knew about 40-degree C thermals across a die back in the 1970s.
A silicon die is not isothermal when it is dynamically changing currents. That article of mine shows 20 to 40 degree C gradients across a die from where the output transistor array is and the ESD diode on the edge of the die I was using to measure die temperature. That along with IR (current-resistance) losses in the die metallization can make using the ESD diode a tricky affaire, especially if the IC designer does not work a couple cubicles down the hall from you.
There are also other tricks to pulsed current. I think it was ON semi that discovered that fast thermal pulsing of a FET would decrease its lifetime by a factor greater than you would predict from the Arrhenius equation. Its not just that the FET is running hot that shortens its life, it is that it is getting stressed with pulses of heat and high thermal gradients.
What else- oh, all this high-temperate operation and huge currents are causing IC manufacturers to worry about electromigration and other problems as well.
I just got off the phone with Jim Williams and he is very familiar with high current designs. His tip was to watch other for every little stray inductance, so the parts don’t get a ring or overshoot that stresses them above and beyond the thermal stress you are hammering them with.
High-current, high-speed, high voltage, that’s why analog design is so fun. Out at the boundaries it really tests your mettle as an engineer.