Delta-sigma antialiasing filter with a mode-rejection circuit
The approach to the antialiasing-filter design for the delta-sigma data converter is significantly different from the approach you would use for a SAR (successive-approximation register) or pipeline (high-speed) converter. With SAR and pipeline converters, you have systems that evaluate one sample at a time. In both cases, the analog signal is “grabbed” and stored on the converter’s input capacitor array. These converters evaluate the stored signal and provide a digital representation of that single sample. With both devices, the target frequency for the multiorder, antialiasing filter is the converter’s Nyquist frequency.
The delta-sigma converter’s input modulator samples the input analog signal numerous times at a high sample rate (F_{S}, Reference 1). The following sinc digital filter resamples and converts a group of these modulator samples to an output digital representation. The conversion process from the modulator’s string of samples to a 24-bit digital code is significantly slower (F_{D}, Reference 1) than the sample rate of the delta sigma’s input structure. Consequently, the delta-sigma converter has two sample rates (F_{S}, F_{D}). The first-order antialiasing filter’s target frequency, however, is the output data rate, F_{D}. You can find the fundamental antialiasing-filter design concepts for a delta-sigma converter in Reference 1.
Once you establish the target antialiasing frequency of F_{D}, you can quickly define the theoretical design formulas, as Reference 2 discusses. The calculation for this theoretical evaluation takes into account resistor noise and converter bits. To determine the theoretical filter resistance (Figure 1), use the following equation:
where ER is the specified effective resolution from the ADC manufacturer’s data sheet, k is Boltzmann’s constant, and T is the temperature in Kelvin. To determine the theoretical filter capacitance, use the following equation:
Note that the circuits and the discussions presented in references 1 and 2 address only the reduction of differential noise, with no regard to the input impedance of the converter or common-mode noise.
In terms of the converter’s input impedance, the capacitors of a switched-capacitor-input, delta-sigma converter are continuously charged and discharged while measuring a voltage between AIN_{P} and AIN_{N} (Figure 2). These internal capacitors (C_{B}, C_{A1}, and C_{A2}) are relatively small when compared with the external circuitry. Consequently, the average input impedance appears to be resistive. The converter’s capacitor values and modulator switching rate set this resistive value.
To measure the common-mode input impedance of the structure in Figure 2, tie AIN_{P} and AIN_{N} together and measure the average current that each pin consumes during conversion. To measure the differential input impedance, apply a differential signal to AIN_{P} and AIN_{N} and measure the average current that flows through the pin to V_{A}. The common- and differential-mode resistance can range from hundreds of kilohms to hundreds of megohms. Those values depend on the circuitry following the input switching-capacitor structure inside the converter. The value of R_{FLT}/2 must be at least 10 times lower than the converter’s input impedances.
The two common-mode capacitors, C_{CM_P} and C_{CM_N}, attenuate high-frequency common-mode noise. The differential capacitor should be at least an order of magnitude larger than the common-mode capacitors because mismatches in the common-mode capacitors cause differential noise.
If the input signal to any ADC contains frequencies greater than half the data rate, aliasing occurs. To prevent aliasing, bandlimit the input signals containing noise and interference components. The digital filters in delta-sigma converters provide some high-frequency noise attenuation, but the digital sinc filter cannot completely replace an antialiasing filter. When designing an input filter circuit, factor in the interaction between the filter network and the input impedance of the converter.
References
- Baker, Bonnie, “Using an analog filter to inject noise,” EDN, July 23, 2009.
- Baker, Bonnie, “Analog filter eases delta-sigma-converter design,” EDN, June 12, 2008.
Complete the simulation of your ADC with IBIS
Simulating the front-end of your ADC
Painless reduction of analog filter noise
The inner workings of the three-op-amp INA
Will the right voltage reference stand up?
Measuring amplifier DC offset voltage, PSRR, CMRR, and open-loop gain
PCB signal coupling can be a problem
Phantom voltage dividers on your PCB
Accidental engineering: 10 mistakes turned into innovation
That 60W-equivalent LED: What you don’t know, and what no one will tell you…
6 famous people you may not know are engineers
DC distribution in your house and 42-V cars
10 tips for a successful engineering resume
The 5 greatest engineers of all time
Higgs Pt. 9: What makes King Carl XVI Gustaf think it’s the Higgs Boson?
10 things you may not know about Tesla
Analog Fundamentals: Instrumentation for impedance measurement
New house brings electric woes
Train safety technology could have saved lives
Football and the Ideal Gas Law
LED Lady, Rumblings of China LED industry shakeout , Metal-free OLEDs on the horizon
What’s your advice to this year’s engineering grads?
Calibration means different things in different professions
First three rules of IoT security
Magnetic reconnection: behind the scenes of NASA’s MMS launch