UBM Tech
UBM Tech

SSDs: mind-blowing Moore's law case studies

-October 01, 2012

I've spent more than a quarter-century in the tech industry, I just realized in preparing to write this post, including the ~2 years' worth of cumulative co-op work I did while in college. Nothing like making a guy feel geriatric, eh? Over this time span, I've been privileged to witness innumerable notable evolutions and revolutions, many of them fueled by the transistor cost, performance and power consumption improvements which Gordon Moore neatly encapsulated in his posthumously labeled Law nearly 50 years ago.

Mention Moore's Law, and I suspect that most folks will think first of processor advancements. While I'm not at all disputing their perspectives, I personally find the semiconductor memory advancements far more compelling. Admittedly, my bias is probably at least in part fueled by my professional background; my first eight years out of college, I worked in Intel's EPROM and (mostly) flash memory division. But consider the following historical facts, followed by recent events, and see if you end up agreeing with me.

Back in the late 1980s when Intel first launched NOR flash memory, the embryonic new technology was at least an order of magnitude more expensive than its EPROM predecessor. it was also diminutive in size: 256 Kbits (i.e. 32 KBytes)...and no, that's not a typo! The first chip that I personally worked on was the 1 Mbit 28F001BX, introduced in 1991 and Intel's first block-erasable device. And one year later, I had the privilege of helping launch the 8 Mbit 28F008SA, containing sixteen symmetrical 64 Kbyte erase blocks. The 28F008SA was notable for shattering previous flash memory pricing, in delivering 1 MByte of capacity for less than $30 in high volumes.

Contrast that with the 32 GByte USB flash memory stick that I ordered the other day, 20 years later, for $15.99. Do the math, and you'll discover that it's 32,000 times larger than, and costs almost half as much as, the then-revolutionary 28F008SA. How has the industry accomplished such a feat? Some of it, of course, comes from fundamental transistor shrinkage; the 28F008SA was initially built on a 0.8 micron (i.e 800 nanometer) process, whereas ~20 nm flash memory processes are currently the state of the art.

Some of the reason also derives from flash memory architecture transitions. The 28F008SA was a NOR device, with fast random access speeds but reduced transistor-packing efficiency as compared to the now-dominant NAND flash memories. And a notable part of the reason is the MLC (multi-level-cell) storage breakthrough that was nearing launch as my time with Intel was nearing an end in late 1996. Intel unveiled MLC via the "StrataFlash" brand name that an Intel peer and I, both outdoors aficionados (therefore explaining "Strata"), jointly came up with.

Conventional flash memory used a single threshold voltage level, whose turn-on effectiveness was hampered (or not) by the presence or absence of additional accumulated charge on the transistor's floating gate, to differentiate between a "0" or "1" value for the transistor when read. With multi-level-cell technology, on the other hand, additional levels enabled each transistor to store multiple bits of information...three levels translated to two bits of data, seven levels to three bits, and so on.

You didn't get something for nothing, of course...MLC flash memories were more susceptible to charge disturb phenomenon from read, write and erase accesses of nearby transistors (which impacted stored-data lifetime), for example, as well as to the inevitable effects of oxide breakdown (which impacted the maximum erase cycle count for a given reliability metric). And MLC flash memories are also less tolerant to operating temperature and supply voltage excursions. Nonetheless, the cost savings can't be ignored for MLC quirk-tolerant applications.

Initially, there was no serious talk of using MLC flash memory for frequently-rewritten mass storage applications. Then MLC devices started appearing in consumer-grade SSDs, with their shortcomings somewhat counteracted by intelligent memory controller designs and file system techniques. But SLC (single-level cell) flash memories were still the technology of choice for enterprise-grade SSDs and/or those applications in which write accesses were a notable percentage of the total.

Now, however, as AnandTech's recent detailed-as-usual reviews showcase:

there's been a definitive turn of the technology screw. SLC flash memory is nowhere to be seen in Samsung's latest SSD 840 family. Two-bit-per-cell MLC devices instead find use in the high-end "Pro" line, where SLC devices had been used a generation before. And conventional 840 series SSD variants employ three-bit-per-cell MLC (i.e. TLC) devices, with equivalent reliability and performance (but presumably much lower eventual per-bit cost) to that in the two-bit-per-cell MLC-based 830 series precursors.


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