Cadence plus Tensilica is a four-way win, particularly for you and your customers
That last part can’t be emphasized enough. This isn’t about Cadence, or Tensilica, or about Cadence targeting Synopsys, or Tensilica vs. Ceva. This is about you meeting your customers’ needs as quickly, efficiently, and cost-effectively as possible.
We know ASIC design at finer nodes gets exponentially and prohibitively expensive for all but the most high-volume, or other corner-case designs, so what’s the next best thing to do when the ROI on going ‘deep’ turns asymptotic? Go wide! Move up the value chain by adding greater functionality thru more tightly coupled IP blocks. IC designers want to do it and EDA tool vendors should and do want to enable it.
This isn’t just at the IC level either, everyone’s doing it: vendors and suppliers are partnering to provide more implementation-ready reference designs, IC vendors are providing more firmware, application-specific communications stacks and Layer 3- and even 4-level software to get you moving faster, and distributors like Avnet have long taken the lead on packaging together more ‘solutions’ versus ICs or parts. EDA is no different.
So why am I so enthusiastic about the Cadence/Tensilica deal? Well, Cadence has had its issues over the years, like any company, but its tools are what you care about and, frankly, they’re top notch, from SoCs to analog design and simulation.
On the Tensilica side, there’s no disputing that it’s just plain brilliant at what it does: programmable IP for dataplane processing, codified in the form of its DPUs (dataplane processing units). If you haven’t worked with them yet, you can learn more at the Tensilica site. From audio, video, graphics and wireless, to automotive, storage and embedded control, its programmable approach and efficient design has been pretty successful. If you like affirmation, how could 200 licensees, including seven of the top 10 semiconductor companies, who have collectively shipped over 2 billion Tensilica IP cores to date, be wrong?
So, we know they’re both good, and that’s exciting in and of itself, though it’s tempered somewhat by the usual concerns over tool compatibility and design flows, integration at the corporate level, who’s in, who’s out and a desire by current and future customers of both companies that neither lose focus on making sure they’re kept happy.
This brings me to a third reason I’m excited by this acquisition: the person behind it, Cadence’s President and CEO Lip-Bu Tan, is an expert at spotting key opportunities and from what I hear, he’s very much focused on the customer’s customer, which means he wants to solve your (the designers’) problems.
He’s smart too, with a B.S. in Physics, an M.S. in Nuclear Engineering from MIT and later an MBA, he went on to found the venture capital firm Walden International in ’87. Some of his investments you may know very well. Me, I’m particularly fond of Ambarella, Beceem, GoPro (makers of that head camera we see everywhere now), Aptina, InPhi and Tilera. See the full list on the site.
What I’m getting at is this: Tan has been involved with Cadence for some time, having been on the board of directors since 2007. But he only joined as CEO in January of 2009. He has proven his skills in spotting solid opportunities, markets and talent through his VC background, but importantly for Cadence, he is inside Cadence but has an ‘outside’ point of view. He’s thinking about trends, seeing the opportunities and incorporating what Cadence needs to help you capitalize upon those opportunities as quickly as possible.
He’s also conscious of partnerships and will surely be shoring up Cadence’s relationship with ARM and TSMC. Yes, Tensilica’s DPUs overlap somewhat with ARM’s DSP extensions, but in reality are complementary. Those partnerships and relationships go deep within the EDA industry too, serving as on the board of directors of both the Electronic Design Automation Consortium (EDAC) and the Global Semiconductor Association (GSA). He knows winning isn’t about going it alone. It’s the best partnerships, best talent, best tools and best relationships, all the way up and down the design ecosystem.
So, let me count again. I said four-way-win, maybe I miscalculated: it’s Cadence, Tensilica, you, your customers, ARM, TSMC, me (just cuz I’m happy to see them get married and am just looking forward to seeing what comes of it), CEVA, because they’ve got great IP too, but now don’t have to compete with Tensilica on the open IP range anymore, and possibly Synopsys, as it reaffirms their own strategy of buying IP in the form of ARC. Any losers here? I can’t think of any, can you? Any more winners?