UBM Tech
UBM Tech

PRBS31: Slower, costlier, worse

-September 26, 2012

Martin Rowe mentioned that PRBS31 (pseudorandom bit sequence) has become the default compliance test pattern for emerging high rate standards. It was in an email so he couldn’t hear me groan. I typed back, “Haven’t you heard one of my test pattern rants?” He didn’t reply.

I looked up “blog” in my updated, edited, supplemented, twisted version of the OED. It didn’t have what I wanted, so I went to a thesaurus. Yes, there it was: blog = rant.

An all purpose test pattern for high rate serial technology has to:
•    Aggravate all reasonably likely ISI (intersymbol interference);
•    Challenge the ability of CR (clock recovery circuits) to lock and hold, and
•    Check receiver circuitry against drift

The 231-1 pseudo-random binary sequence (PRBS31) combines every permutation of 31 bits. The different permutations excite different ISI profiles that are needed to test any intrinsic ISI in a transmitter, to gauge the quality of channels, and to stress receivers.

Testing CR circuits requires long strings of CIDs (consecutive identical bits). PRBS31 has at most 31 CIDs. Data encoded with 64B/66B (e.g., 100 Gigabit Ethernet) and 128B/130B (e.g., PCIe 3 and up) with self-synchronized scrambling can produce up to 64 (126) CIDs but scrambling reduces the probability of more than 31 CIDs to less than one in 10-12 so errors born of those CID strings are below our pain threshold; PRBS31 meets the CR test requirement.

Drift is caused by imbalance in the pattern. PRBS31, with all those permutations, has overall mark balance (50% mark density), but long runs of imbalance. Check.

It works. So what’s my problem?

By using a test pattern that’s over 2.1 billion bits long, the standards have inflated the cost of test, reduced test accuracy, and increased test time. Instead of “faster, cheaper, better” PRBS31 delivers “slower, costlier, worse.”

Let’s start with cost. Equivalent time oscilloscopes, (e.g., Agilent’s DCA, Teledyne LeCroy’s WaveExpert, and Tektronix’ DSA) provide the lowest noise, highest bandwidth test equipment at the lowest price. They cannot trigger efficiently on a pattern that is 2.1 Gbits long – yes, of course, the product teams have found ways to make measurements on ridiculously long patterns, but at the cost of accuracy and efficiency. The alternative, real time oscilloscopes at 30+ GHz bandwidth, are noisier, cost more than twice as much, and can’t hope to have the memory depth to acquire even a single repetition of the PRBS31.

“What about BERTs?” you say. You could even quote papers I’ve written where I wax philosophically about BERTs like a bandwidth-starved geek. BERT’s sample every bit. They love PRBS31, right? Wrong!

Measurement accuracy requires statistical certainty. Statistical certainty require a reasonable sample size. Each sequence within the PRBS31 presents a unique combination of ISI, mark density, and transition density so tests should be performed on complete repetitions of the pattern. When RJ (random jitter) and SJ (sinusoidal jitter) are applied to stress receivers, you end up with elements of that pattern being stretched and squeezed in different spots during different repetitions.

How many repetitions of the PRBS31 are necessary to sample all reasonably likely combinations of ISI, SJ, and RJ? At least 20 repetitions gives the SJ and RJ distributions a fighting chance of some representation over the course of the PRBS31.

That’s 43 Gbits that have to be captured on your scope or tested at each sampling point position on your BERT’s bathtub plot to test a transmitter, interconnect, or to set up a stressed eye tolerance test for a receiver.

PRBS31 is too long to simulate, too long to capture, and too long for a pattern trigger. I admit another bias. PRBS31 isn’t clever. Standards committees have some the sharpest minds in the industry, but PRBS31 is dumb, obvious, and therefore disappointing.

OIF-CEI, of course, has an alternative. The “CID Jitter Tolerance Pattern” includes a run of 72 CIDs, that’s 72 consecutive 0s, a seed, then a run of at least 10328 bits from the most egregious section of the PRBS31, followed by the complement of the entire pattern. At about 21 kbits, the OIF-CEI CID Jitter Tolerance Pattern is wholly manageable and more stressful than the PRBS31. In other words, it’s faster, cheaper, and better.

But I bet you could do better.

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