# Impedance measurements stabilize op-amp buffers

The unity-gain op amp (operational amplifier) buffer circuit is routinely used to transform high-impedance inputs into low-impedance outputs. ADC (analog-to-digital converter) voltage references are also frequently buffered to reduce the voltage reference noise resulting from the ADC sampling current.

When implemented well, using an appropriate op amp, the results work out nicely. More frequently than not, however, the op amp (Figure 1) suffers from degraded stability caused by output capacitive loading either from components or frequently from the capacitance of a multilayer PCB. The degraded stability results in high output impedance and high output noise, the exact opposite of the circuit's intended function. To improve stability, start by measuring the op amp's impedance.

**Figure 1. Op amps are often used as unity gain signal buffers, which are not as simple to use as it may appear.**

**The measurement**

Measuring the stability of this circuit can be challenging because of the circuit's wide bandwidth and the interaction between the op-amp circuit and the PCB. As a result of the interaction, we would ideally like to measure the impedance of the unity-gain buffer while in the circuit. Otherwise, we would need to precisely replicate the circuit board loading in a test fixture. Measuring in-circuit is faster and requires much less effort than replicating actual conditions in a test fixture.

Bandwidth is another challenge. In this example, the bandwidth is nearly 200 MHz, well above the range of an FRA (frequency-response analyzer) such as those from Ridley Engineering or Venable Instruments. Even if the circuit could be measured using an FRA, the interconnections between the instruments and the PCB would be complicated at 200 MHz.

**Output-impedance measurements**

The simplest solution is to measure the output impedance of the op amp, in-circuit, using a 1-port reflection measurement in a VNA (vector-network analyzer). The VNA is connected using a low-frequency DC block to a 1-port 50-Ω transmission line 1x probe. The DC block is used to isolate the op-amp's output from the 50 Ω VNA impedance. Calibrate the probe using a standard SHORT-OPEN-LOAD method before performing the measurement. Currently, the OMICRON Lab Bode 100 and the Keysight E5061B with a NISM (non-invasive stability margin) software option can transform the impedance measurement into a phase-margin plot.

The measurement in this example is performed using a Picotest VRTS3 demonstration board (**Figure 2**), which includes a 245 MHz op amp connected as a unity-gain buffer. The board has two switchable load capacitors that demonstrate the impact of the capacitive loading on the op amp and resulting measurement. The VRTS3 board also includes the SHORT-OPEN-LOAD calibration pads. Because the measurement bandwidth is above 30 MHz, I used the E5061B VNA's high-frequency port.

**Figure 2. The demonstration board, shown here with a Keysight E5061A VNA, has switchable capacitors for demonstrating loading effects on measurements and the non-invasive stability assessment.**

The E5061B impedance measurement is performed using a 1:1 50-&Omaga; transmission line probe (**Figure 3**).

**Figure 3. A 1GHz+ transmission-line probe is calibrated using a standard SHORT-OPEN-LOAD protocol prior to performing the impedance measurement.**

The capacitance of the probe is negligible (<0.2 pf) so it won't load the circuit and impact the measurement. Both the magnitude and phase are displayed in **Figure 4**. The NISM software add-on for the E5061A directly computes the stability (phase) margin from the impedance measurement. In this case, the op amp has only 2 degrees of phase margin at approximately 164 MHz (very unstable).

**Figure 4. The impedance magnitude and phase are recorded on the E5061B using a 1-port method prior to running the non-invasive stability assessment software.**

**Figure 5**.

**Figure 5. The non-invasive stability assessment software extracts the effective Q and the phase margin from the impedance magnitude and phase measurement.**

**Improve stability**

The poor stability can be improved in one of three ways:

- Improve the circuit design by reducing the PCB or loading capacitance. This is generally a difficult solution to implement.
- Insert an isolation resistor between the op-amp output and the rest of the circuit (Figure 6). The value of resistor is easily calculated from two data points on the output impedance trace. One point is the resonant frequency, 164 MHz in this case. The second is any point below resonance. A convenient point is 20 dBΩ (10 &Omega) at 100 MHz.

This still requires the PCB to be redesigned in most cases. - Place a series RC network from the op-amp output to signal return (
**Figure 7**). The value of the resistor is the same as calculated above and the capacitor is calculated as:**Figure 7. Adding a series RC network from the buffer's output will stabilize it by compensating for the op-amp's inductance.**

**Figure 6. Placing a series resistor on the buffer's output can improve stability.**

This "fix" can usually be implemented more easily, though it may not be elegant. Just be sure to keep wiring appropriate for the circuit frequency, 164 MHz, in this case.

For a given op-amp bandwidth, the effective inductance of the op amp is a good figure of merit. In general, the lower the impedance, the greater the op amp's tolerance to capacitive loading. If you're comparing op amps, be sure to include output impedance in the comparison.

**Conclusion**

The impedance measurement can be easily performed quickly and in circuit using a 1x transmission line probe, even for high bandwidth devices. The VNA can transform the impedance measurement directly to stability margin and two data points can be used to determine a "fix" for low-stability margin circuits.

**Also see**

Take a video tour of Steve Sandler's test lab

Analog Fundamentals: Instrumentation for impedance measurement

Impedance: an essential multidisciplinary concept

Measure a 75Ω cable with a 50Ω VNA

Quick & dirty cable length & impedance measurement

*Want to learn more? Register now for DesignCon, the premier conference for chip, board, and systems design engineers.*

DesignCon is managed by UBM Tech, EDN's parent company. Get updates on Twitter, Facebook, & DesignCon Central.

*Taking place January 27-30 at the Santa Clara Convention Center,**DesignCon 2015*will feature technical paper sessions, tutorials, industry panels, product demos, and exhibits.DesignCon is managed by UBM Tech, EDN's parent company. Get updates on Twitter, Facebook, & DesignCon Central.

That 60W-equivalent LED: What you don’t know, and what no one will tell you…

6 famous people you may not know are engineers

10 tips for a successful engineering resume

Why does this year have an extra second?

Da Vinci unsuccessfully tests a flying machine, January 3, 1496

## Almost Done

Please confirm the information below before signing in.

{* #socialRegistrationForm *} {* firstName *} {* lastName *} {* displayName *} {* emailAddress *} {* addressCountry *} {* companyName *} {* ednembJobfunction *} {* jobFunctionOther *} {* ednembIndustry *} {* industryOther *}