Testing times for design engineers

-October 31, 2014

During the summer of 2008 when my colleagues and I were designing the payload processor for the Alphasat telecommunication satellite, I needed to source a key component for the mixed-signal chain. The problem was, there were no space-grade versions of the part! Following a meeting with a major supplier, we discovered that one of their commercial offerings was fabricated using a technology that had many intrinsic, hardening features, e.g., silicon-on-insulator for latch-up protection and SiGe for total-dose immunity.

Several weeks later, I received some samples, which I started testing in the laboratory: I could measure a performance of 40 dB, the customer wanted 46 dB, and the supplier was claiming and crucially measuring 47 dB. Where was the missing 7 dB? Following a conversation with the manufacturer of the chip, we discovered that the noise floor of my inferior spectrum analyser was polluting the test.

Two days later, one of my test & measurement partners kindly loaned a better spectrum analyser to allow me to repeat the characterisation. It didn't take long to reproduce a measurement of 47 dB, and in terms of performance, I had found a part which we ultimately de-risked, qualified and used within telecommunication and Earth observation satellites.

The space industry wants to exploit the performances being offered by consumer electronics and is baselining components with advanced specifications. Characterising sub-systems containing high-power devices switching at megahertz/gigahertz frequencies with very fast edges is stretching the capabilities of measurement equipment, and we all have to become test engineers to understand what's inside the box, the sources of errors, and how to use DSOs, VNAs, TDRs, signal generators and spectrum analysers properly. The photograph below shows one of the test racks used to characterise payload-processor hardware before integration and delivery to the customer.

Figure 1: Payload-processor test rack.

One of our respected colleagues, Steve Sandler from Picotest, is about to release a new book titled, Power Integrity: Measuring, Optimizing and Troubleshooting Power Related Parameters in Electronics Systems. I was fortunate enough to receive a review copy and wanted to share my thoughts with you.

One of the frustrations of space electronics design is that datasheets are incomplete and getting worst-case and reliability data from some component manufactures can be difficult, especially for missions that baseline COTS devices. In some cases, the information supplied lacks fidelity or is simply inaccurate. These concerns are shared by Steve and he hopes his book will help vendors understand why certain data is required.

Steve's book is written for design and test engineers as well as technicians, and describes how to make high-fidelity measurements in an electronics laboratory. Six of the fifteen chapters focus on power integrity and explain how to verify the operation of voltage regulators and references.

The text is split into two sections with the first five chapters providing background information related to best practices, measurement fundamentals, the types of test equipment, and how to connect instruments to a circuit-under-test including probe selection. The latter chapters offer a useful reference on the different measurement types.

Chapter 5, Probes, Injectors and Interconnects, includes a description of how probes can impact measurement accuracy, load the device-under-test affecting its performance, e.g., a high-capacitance probe connected to the output of a high-speed op amp could cause it to oscillate. Simplified, equivalent schematics of probe loadings are provided to aid the discussion.

Chapter 6, The Distributed System, introduces the power-distribution network (PDN) found within products exploring the various noise sources and the pathways that spread them throughout a system. Internal regulator noise, PSRR, output impedance, reverse transfer and crosstalk are discussed, as well as the contribution of the PDN impedance interacting with the control loop of a voltage regulator. Poor stability adversely affects all of these resulting in system-level degradations such as increased clock jitter and reduced SNR/BER.

Chapters 7 to 13 describe techniques to measure impedance, control-loop stability, PSRR, reverse transfer and crosstalk, step-load response, ripple and noise, and edges respectively. Steve has provided a fresh perspective on these tests using different domains, instruments and techniques.

Figure 2 shows a linear regulator connected to a spectrum analyser using a DC block and the cyan-coloured waveform on the right plots the measured frequency of average noise as well as periodic ripple present on the output rail at harmonics of 1 kHz. The instrument's noise floor is shown in yellow and the green trace is the output from a custom-designed, ultra-low-noise regulator.

Figure 2: Ripple Measurement (images courtesy of McGraw-Hill).

Chapter 15, High-Frequency Impedance Measurement, brought back memories and discusses TDR, calibration, cable de-embedding, de-skewing and estimating series inductance and shunt capacitance. TDR allows the reader to understand in the time domain where, when, and the type of discontinuity.

The images below show an assembly of a TDR instrument connected to a transmission path comprising an SMA adapter, coupler, PCB trace, a second coupler and short/open load terminators. These elements have been added individually to illustrate how the measured impedance changes with each addition to the transmission path and the impact of each connection.

Figure 3: Illustration of TDR measurement (images courtesy of McGraw-Hill).

For those of you who design and verify power supplies, I would highly recommend Steve's new book to ensure your designs are built and characterised correctly. Chapter 14, Troubleshooting with Near-Field Probes, is a valuable resource that will strike a painful chord with many designers of electronic hardware who have had to deal with unwanted EMI.

For those of you who design and verify spacecraft subsystems and test satellite hardware, the book will serve as a useful reference for electronic, test & measurement best practices and the latter chapters can be re-read as needed. In many ways, the text concisely summarises the scribbles in our laboratory logbooks, as well as application notes and manuals from companies such as Agilent (now Keysight) Technologies, Tektronix, Rohde & Schwarz, Teledyne LeCroy and others. The plots captured from the various test equipment together with the photographs that show the connectivity between the instruments and the circuits-under-test really help readers understand key concepts.

Thank you to Steve and McGraw Hill for the opportunity to review their latest text and for allowing me to reproduce some pictures. If you have a new book that you think would benefit the space electronics community, get in touch.

To deliver the next generation of missions and spacecraft to our customers, we all have to become test engineers as well - until next month, happy test & measurement!

P.S. I'll be speaking about Analog, Functional Verification: Right-First-Time Designs Signed-Off with Confidence at the Mentor Graphics' U2U Forum in Munich next month. This is a great, one-day event in the EDA calendar where users share their experiences with the IC and PCB design communities and learn from one another. My talk will cover some cool modeling that you can do using the Hyperlynx tools, e.g., post-layout, functional verification and S-parameter extraction of circuits that have instantiated third-party SPICE and S-parameter simulation models - hope to see you in Germany!

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