# Design-oriented circuit dynamics

**Circuit Dynamics Article Series Preface**

The first few articles in this series were originally published in a different form at www.en-genius.net as the July - September 2012 monthly technotes. Then En-Genius ceased operations in October 2012. To provide a complete set of articles here at

*EDN*, the first three have been reworked, reorganized, and extended.

This series is excerpted from a 43-page monograph, “Design-Oriented Analysis of Dynamic Circuit Response” which was a document that I wrote to organize my own thinking while writing *Transistor Amplifiers*, an approximately 423-page book that has been submitted to a prospective publisher. This series can be considered a glimpse into some of what the forthcoming book addresses.

Circuit dynamics is often the hardest aspect of circuit design and deserves some systematic attention. Reading through this series will put you back in school, but if I succeed in my goal in writing it, you will come out of it with a few clear and powerful ideas on how to design dynamic circuit response. Happily, as is so often the case in electronics, the higher math transforms into the complex-number algebra of the *s*-domain and results in a sometimes-intensive application of high-school math.

Some of what is presented here is found in typical engineering circuits textbooks to provide conceptual continuity, but much of it is not. Some insights have been culled from the textbooks I have, though the series goes well beyond textbook-level treatment to include some of what wideband oscilloscope amplifier designers at Tektronix have known for decades, though diffusion of these powerful concepts into the industry has been slow. Then there are circuit theorems that have yet to become widespread in practice that can simplify circuit analysis for design. Some of these are included in the series.

**Circuit Dynamics for Design**

Some engineers have lapsed into the habit of designing circuits by diddling with them on SPICE until the desired behavior results. This is the counterpart in older days of putting adjustments into prototype circuits and tweaking them. In both cases, it is *experimentally-driven* design. A blunter way of putting it is that it is designing without the illumination of methods of analysis that guide design toward optimal solutions. In this article, we look at some aspects of circuit analysis that lead to simpler methods for design.

The problem of how to algebraically determine the bandwidth and *s*-domain poles and zeros of transistor circuits has its roots in the mathematics of transfer-function polynomials and their relationship to circuit structure. Some of the theorems in the theory of equations reveal what the coefficients of the transfer function polynomials must be and from them have developed techniques for finding dynamic circuit response - primarily bandwidth - of transistor amplifiers.

The techniques are all algebraic rather than numerical so that the effects of circuit elements on performance for design can be identified in the equations and their effects evaluated. A roughly historical progression of refinement to simpler, more intuitive methods is shown below.

The dynamic response of circuits is most easily (and most often) determined by computer circuit simulation. This method numerically solves the basic circuit equations in matrix form as a matrix inversion problem. The solution is the circuit behavior. Symbolic circuit computation can produce results in parametric form, but the math expressions (for a circuit of any complexity) are unwieldy (or of “high entropy”) and generally difficult to interpret and apply to design.

Both numerical and symbolic computer solutions do not reveal the kinds of insights into the relationship between circuit structure and behavior that is desired for design because neither make explicit the higher circuit principles which bring a clarifying simplicity to the analysis. *Design-oriented analysis* emphasizes higher-level principles involved in the circuit. The methods of analysis in the chart attempt just that and some of the underlying ideas common to them are brought out in this series so that a clearer view of the whole of design-oriented analysis leaves us with a few simple “metaconcepts”.

**Circuits and their Polynomials**

We begin with some general observations about circuits and transfer function poles and zeros. Each independent reactive element (capacitance or inductance) in a circuit contributes an *s* to the circuit equations, either in *s*·*L* or 1/*s*·*C*. In the basic loop or node equations, some reactances combine into one effective reactance because they are in series or parallel. A less obvious dependence is capacitors that form a loop, as is the case in the hybrid-pi model of a BJT stage, with the loop shown below.

Although (besides ground) two separate nodes are involved, C cannot be reduced to a simple two-terminal equivalent. The resulting node capacitances are

where || is not a topological descriptor but the parallel math operator for capacitances in series. The three Cs form a dependence in these two nodal Cs as all three are involved in both nodal capacitance expressions. Three Cs form equivalent capacitances at two ports. Consider reactive-element dependencies to be reduced to single effective reactances for the following general circuit theory. Thus the three Cs are equivalently 2 Cs at the 2 nodes.

Reactive elements, having two terminals, can each be viewed as connected across a port into the rest of the circuit. The resistance of the circuit at the port (or “looking into the circuit” at the port) is the *driving-point resistance* which forms a time constant with the port reactance. These time constants relate to poles or zeros in the transfer function(s) of the circuit. For two poles and two zeros, a transfer function in normalized form is

where *τ _{n}* is the natural time constant and

*ζ*is the damping. Factors of first and second-degree polynomials in numerator and denominator result in two poles (the roots of

*D*(

*s*)) and two zeros (roots of

*N*(

*s*)). Time constants,

*τ*, in polynomial factors are of the form (

_{i}*s*·

*τ*+ 1) = (

_{i}*s*/

*p*+ 1), and the poles in

_{i}*D*(

*s*) (and zeros in

*N*(

*s*)) are –

*p*= –1/

_{i}*τ*or –

_{i}*z*= –1/

_{i}*τ*.

_{i}From *n* reactances results an *n*-degree pole polynomial, *D*(*s*), and up to an *n*-degree polynomial of zeros, *N*(*s*). The general form of the transfer function is that of a rational function of polynomials in the complex frequency, *s*. In normalized form, both polynomials are of the form

Each frequency variable *s* has a unit of s^{–1} (1/second) so that *s ^{m}* has units of s

^{–m}. The polynomial terms must be unitless because

*a*

_{0}= 1 is unitless. Thus

*a*must have units of s

_{m}*(and have*

^{m}*m*time constants) and consequently must be the product of

*m*reactive elements: X

_{1}

^{.}X

_{2}

^{....}X

_{m }where

*X*is

*C*or

*L*.

The number of terms in *a _{m}* is the combination of

*n*reactances taken as

*m*products at a time, or

Then the number of terms in *a*_{0} and *a _{n}* is

Moving in one term on each end of the polynomial, the number of terms of the coefficients of degree of 1 and *n* – 1 is

The number of terms is symmetrical with *m*. Coefficients of highest and lowest degree, then next highest and lowest, etc., have the same number of terms. For *n* = 2, the number of terms, in order, are: 1, 2, 1. For *n* = 3: 1, 3, 3, 1; and for *n* = 4: 1, 4, 6, 4, 1.

The linear coefficient, *a*_{1}, of the *s* term is a sum of time constants of each reactance with a circuit resistance that is the port resistance of the reactive element with the other reactive elements set to zero (Cs open, Ls shorted). With *C _{j}* = 0 pF,

*j*

*i*, the open-circuit resistance of

*C*can be found. By setting

_{i}*C*to zero, all the higher-degree terms are set to zero too, leaving only the

_{i}*C*open-circuit resistance.

_{i}To show this, consider the following two-port circuit.

The port equations using resistance parameters are

The impedance of the capacitors is 1/*s*·*C _{j}* = –

*v*/

_{j}*i*where voltage and current are of the same port. (The negative sign refers the port impedance to the other side of the port, where

_{j}*C*is (or “looking into

_{j}*C*”) because the current direction by port convention is reversed by it.) Hence the 1/

_{j}*s*·

*C*are paralleled with the

_{j}*r*which are the open-port resistances. The port 1 open-port resistance,

_{jj}*r*

_{11}, is

For port 2,

In general, for *n* C ports, all are open-circuited while *R _{jj}* is found. Thus we have a method for finding the

*open-circuit time constants*(

*OCTC*s) of the

*C*of a circuit. For Ls, the dual situation applies and inductance ports are shorted instead of opened. For mixed Cs and Ls, open Cs and short Ls.

_{i}The above two-port argument does not prove that the linear term in *D*(*s*) is the sum of OCTCs, only that the other capacitor ports must be open-circuited to find the port resistance *R _{jj}*. If each of the capacitors is to contribute to the linear-term coefficient, they must appear in it in a term without other capacitances as products in order to form a time constant of unit s to cancel the s

^{–1}unit of

*s*.

Thus the coefficient must be a sum of time constants of each capacitor. To eliminate the effects of the other capacitors in *D*(*s*) they are set equal to zero (that is, open-circuited). Then only the resistance of capacitor *C _{j}* remains in the linear term and is thus

*R*. The higher-degree terms of

_{jj}*D*(

*s*) go to zero leaving the pole

*s*·

*R*·

_{jj}*C*+ 1, where

_{j}*R*is the resistance of the port of

_{jj}*C*with ports of other capacitors open-circuited.

_{j}**Pole Time Constants and OCTCs**

When the time constants in the coefficients are combinations of products of the OCTCs in *a*_{1}, then the poles (or zeros) correspond to the OCTCs as *p _{i}* = –1/

*τ*. For a circuit with all real poles,

_{i}*D*(

*s*) is the product of the pole factors

The *s* terms are the OCTCs. After the OCTCs are found, the coefficients of the terms of higher degree are determined. However, not just any *τ _{i}* in

*a*

_{1}appearing as a sum of time constants in

*a*

_{1}from circuit analysis are OCTCs. The

*τ*in

_{i}*a*

_{1}

^{ }must be grouped together with a common

*C*factor in each term for the terms to be OCTCs.

_{i}For the time constants of poles or zeros, every term in *a _{m}* has a unique set of conditions (opened and shorted ports) that isolate the

*τ*in

_{i}*a*as having a port resistance at port

_{m}*i*. A term in the transfer function polynomials can be isolated by setting all other terms to zero.

Other reactive factors are eliminated by shorting port *i* so that a given *C _{i}* goes to infinity or opening it to set

*C*to zero. In the polynomial, to short

_{i}*C*, divide all

_{i}*a*by

_{m}*C*. All terms not containing

_{i}*C*as a factor are set to zero. When any

_{i}*C*is opened,

_{i}*a*= 0. This scheme of isolating terms is the basis for the method of Cochrun and Grabel to find the circuit poles, and of the

_{n}*n*Extra Element Theorem. A. M. Davis worked out methods based on it. For

*n*= 3,

*a*

_{2}can have the form of a polynomial with complex roots:

_{2}= (

*R*

_{1}·

*C*

_{1})·

*R*

_{2;1}·

*C*

_{2}+ (

*R*

_{1}·

*C*

_{1})·

*R*

_{3;1}·

*C*

_{2}+ (

*R*

_{2}·

*C*

_{2})·

*R*

_{3;2}·

*C*

_{3}

where the *R _{i}* are the OCTC resistances from

*a*

_{1}and

*R*

_{m}_{;k}are the resistances to be found. The port resistance,

*R*

_{2;1}is found at port 2 by shorting port 1 and opening the other ports. The method is described in more detail later.

One of the issues to be addressed is whether the OCTCs associated with reactive elements are the only way to determine the poles and zeros of transfer functions and port impedances, or whether they can be calculated from time constants at nodes instead. The answer generally is *no*, though the differences in value can be subtle and therefore misleading, as will be shown in a subsequent article.

**Closure**

In this article, some of the basic insights needed for organized algebraic (and hence design-oriented) analysis of circuits have been reviewed. With the transfer function of a circuit, the bandwidth or risetime can be determined by various methods, the subject of a forthcoming article.

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