Moshe Gavrielov looks into the future of Xilinx and the FPGA industry
One of the favorite unfair tactics of the press is to pounce on a newly-selected executive and ask him or her to foretell the future of the industry. This is particularly mean if the executive involved is making a major industry transition. But sometimes it yields some very interesting insights. That was the case today in a chat with Moshe Gavrielov, the newly-appointed president and CEO of Xilinx.
Gavrielov’s previous assignments haven’t been obviously connected to his new one. He spent ten years designing high-performance processors and peripherals. Then there was a long stay at then-LSI Logic, where, in Gavrielov’s words, he helped drive the transition from LSI as a company that supplied empty gate arrays to a company rich in IP and integration expertise. The third phase of Gavrielov’s career took place at start-up Verisity and then at acquiring company Cadence. “We recognized then that front-end logic verification had become the top problem in chip design,” Gavrielov said. “In fact, I think it still is one of the top problems.”
So other than general management experience, what does this background have to do with running a $2B, apparently maturing, fabless FPGA giant? Gavrielov sites an interesting parallel. “I think the opportunity for growth here is that FPGAs are becoming more and more relevant to a wider range of designers. But it’s not just about gates—it’s about the IP as well. In that way, Xilinx today is in a similar transition to the one LSI had while I was there: moving from a supplier of blank gates to also being a supplier and supporter of the IP that goes into the gates. But supporting a body of IP in the field is a non-trivial undertaking.”
So Gavrielov sees a three-fold challenge for Xilinx. First, it must maintain its pace in enlarging the capabilities of the underlying silicon. Second, it must build its portfolio of IP across a growing breadth of applications. And third, the company must continue to pour investment into its development tools, so they are able both to serve the needs of an increasingly diverse—and, one suspects, increasingly specialized and FPGA-naive—community of users and to continue hiding the growing complexity of the actual FPGA circuitry from those users.
What is supposed to pay for all that investment? Gavrielov frames the answer in terms of two factors: increasing penetration into what had been the ASIC world, and increased leverage of Xilinx’s internal resources. On the one hand, “Cost of entry for an ASIC design is skyrocketing. More and more applications are becoming unaffordable for ASICs, and falling into the sweet spot for FPGAs,” he says. “This puts the wind in our sails. It gives us the opportunity to grow from a $2B company into a $5-10B company.”
But on the other hand, “This also requires scaling. We can’t grow revenue that much by linear growth in people. So we must invest in tools and IP in order to serve a much wider market using the people we have.”
In a semiconductor industry of at least temporarily diminishing expectations, in which much of the growth is sought in the low-power, low-margin consumer world—one that has been firmly resistant to FPGA technology in the past—that is a bold bet. The investment to create new silicon, new tools, and greater scalability will have to come first, and the answer as to whether the growth is really there will come second. Gavrielov should not have a boring tenure at Xilinx.