Significant advances still necessary for EUV to succeed
With the news out today about ASML acquiring Cymer, I thought it would be good to review what EUV lithography is all about and the state of the technology. First let’s talk about why we need extreme ultraviolet in the lithography process. As the technology nodes get smaller, it becomes necessary to draw ever smaller lines and features so as to make smaller transistors. This is done by using masks and exposing the silicon wafer, covered in a photoresist, to light. But here in lies the problem. Smaller geometries require a shorter wavelength. Ultraviolet light is around 365 nanometers and deep ultra violet is at 248 and 193nm. But we are using these to draw lines 20nm wide, so we are using a crayon to draw something the thickness of a hair – ok, perhaps that is an exaggeration, but I hope you see the analogy. To compensation for this, EDA and lithography tools have had to create magic in order to reduce the errors in the exposure process, including double patterning and optical correction methods.
In order to get to 14 and 10nm we need to migrate to extreme ultraviolet (EUV) which is at 13.5nm, right in the middle of visible light and X-rays. If that can be done, then it should see us through several new generations of smaller node sizes.
But EUV is not easy. Photons are emitted from a substance when an electron is stripped from it, but the wavelength of the light is related to bonding layer in which the electron travels. It is not just any electron that will do and for EUV, it has nothing to do with any of the easily dislodgeable valence electrons. Wikipedia gives an example that it would take removal of an electron from a +3 charged carbon ion (three electrons already removed) and this requires about 65 eV.
To achieve this you first have to turn a suitable substance into a plasma which takes 1011 W/cm2 and to create this may require something in the order of 200kW given the typical efficiency of a laser. Now, even once produced the problems continue to mount. First, the light must be made coherent and focused and this would normally be done using lenses, but the glass of a lens would immediately absorb the EUV photons, so the machine has to use mirrors instead. ASML talks about the quality of the mirrors required. They say that if one of the mirrors were to be blown up to the size of Germany, the biggest bump would be less than 1 millimeter high. The mirrors are coated with hundreds of layers, which are as thin as 3 nanometers — about a dozen atoms. Still not the end of the problems - air absorbs EUV light, so the exposure of the wafer must happen in a large vacuum chamber.
OK, some specifics. The material that Cymer uses in their EUV lasers is tin and they shoot a droplet of it with a pulsed CO2 laser. The laser heats the droplet of tin to the point of evaporation and super-heating to critical temperature, then the atoms shed their electrons and become highly ionized (i.e. a plasma). The ions created by the interaction of the laser pulse and tin emit photons, which are collected by a highly reflective mirror. The mirror reflects and directs the resulting 13.5nm wavelength energy and focuses it through an aperture and into the lithography system.
One of the problems has been getting the power level of the lasers up to the point that they would be able to achieve the necessary production rates. It is estimated that it would take 100W to process 60 to 1235 wafers per hour, the current throughput of the EUV lithography machines. Cymer currently makes lasers that are 11W and this gives a throughput of up to 7 wafers per hour. ASML and Cymer have proven in the lab a laser that is capable of achieving 30W sustainable, bringing the throughput up to 18 wafers per hour once productized. ASML is taking orders for its equipment based on achieving 69 wafers per hour by 2014 which shows how dependent their future is on the lasers and thus their acquisition of Cymer.
Brian Bailey – keeping you covered
If you liked this feature, and would like to see a weekly or bi-weekly collection of related features delivered directly to your inbox, sign up for the IC Design newsletter.