PCIe Gen 4 on the drawing “board”

-June 23, 2011

EE Times’ Rick Merritt reported yesterday that “The PCI Special Interest Group has determined it can squeeze out of copper links at least one more high speed version of PCI Express before a likely transition to optical interconnects. PCIe Gen 4 is expected to deliver at least 16 GTransfers/second when it debuts in products in about four years.” PCIe Gen 3, which runs at 8 GTransfers/s is in many ways just beginning deployment. As you can learn in “The chips almost test themselves,” Testing PCIe bridges and switches for speeds PCIe Gen 3 speeds is no easy task. The chips need built-in testers because external test equipment can’t see what’s going on inside a chip. PCIe Gen 4 will make signal-integrity measurements even harder.

Merritt noted that the focus of PCIe Gen4 development will focus on PCB traces and the signal losses that occur at such high speeds. Signal-integrity engineers and PCB designers will likely develop new measurement techniques to transmit, receive, and measure these signals, starting with new designs for prototyping and evaluation boards.

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