Maskless copper deposition could slash metallization costs in ICs
Whereas much rocket science goes into making the minimum-geometry metal lines at the bottom of the interconnect stack on an IC, no one pays much attention to making the upper metal layers on which the spacing is relaxed, the metal is thick, and some processes still use aluminum. A relatively new idea from Replisaurus could address those problems.
Replisaurus makes an oxide-on-wafer template, etching it so that a trench is everywhere in the oxide that requires copper on your IC wafer. The company then coats the bottom of each trench with a reusable electrode material. This step makes each trench in the template into a microsized electroplating chamber, with the template oxide forming the top and sidewalls and the target wafer forming the base.
To use the template, you deposit approximately 5 microns of copper into the trenches. You then press the template onto the surface of a wafer, which you have prepared with a copper-seed layer. When you turn on the power, the copper in the trenches electroplates onto the seed layer of the IC wafer. Each trench contains its electroplating process, so you get an accurate shape and controllable thickness of copper on the wafer. After plating, you strip any remaining copper from the template. You get about 500 prints from a template before it wears out.