EDN's 19th Annual Innovation Awards Finalists

EDN Staff - February 2, 2009

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Category: Microcontrollers
Finalist: PIC32 32-bit microcontroller (Microchip Technology)

With the PIC32, Microchip offers an entire 8-, 16-, and 32-bit microcontroller product line supported by a singular IDE. The M4K core has delivers 1.56 DMIPS/MHz operation, through its efficient instruction-set architecture, 5-stage pipeline, hardware multiply/divide unit, and dual sets of 32 core registers. The PIC32’s multi-layer switch fabric, or bus matrix, enables high data throughput. The DMA controller uses this switch fabric to enable DMA transactions from anywhere to anywhere.

Other innovations include a prefetch buffer with cache, a hardware-vectored interrupt controller with 64 vectors, and a full 32-register shadow set. The enhanced on-chip debug, via two-wire or JTAG interfaces, supports eight com-plex hardware breakpoints (six instruction and two data). The on-chip instruction trace is completely unintrusive to the target, uses only five reclaimable pins, and is triggered by complex breakpoints.

The PIC32 maintains compatible peripherals and pin-outs with Microchip’s 16-bit families, enabling upgrades using the same socket and board layout. It also retains Microchip’s peripherals, including serial communications, a 16-bit Parallel Master Port supporting additional memory and displays, and a single-supply on-chip voltage regulator. Micro-chip also provides compatible peripheral libraries with a common set of APIs for its 16- and 32-bit families; along with middleware stacks, such as TCP/IP, USB and Graphics libraries, which run on both.

Atomic single-instruction peripheral bit-wise set, clear and invert operations dramatically improve peripheral—and peripheral-focused interrupt routine—performance, while reducing code space. Its shadow set of 32x32-bit core regis-ters allows high-priority interrupts to function in their own context, without having to first push the processor registers to the stack. The PIC32 also supports MIPS16e 16-bit ISA code compression—reducing codes sizes by up to 40%.