Moore's Law under fire again
For the first time since Moore’s Law was developed in 1965, the road map to the next process node for advanced semiconductors is lacking a clear direction—and some would say any direction at all.
While researchers can see their way down to the 22-nm process node — roughly two nodes ahead of where they are developing now — the next step is completely out of focus for most of them. Until now, the road map always was understood for at least several successive generations, doubling the number of transistors on a piece of silicon every two years, even if the details about how to get there weren’t clear. Beyond 22-nm, however, most executives say there is almost no understanding of technologies to be used or the equipment that will be needed to create it.
Equipment makers are typically at the forefront of understanding the problem, because they have to build the machinery far enough ahead of the problems to solve them for mass production. But what happens after 22-nm is raising more questions than any previous generation.
“That’s a big question for us,” said Mike Splinter, president and CEO of Applied Materials. “Is 15-nanometers really in the cards? I think it will be, but will it use the same kind of structures that we use at 32-nanometers or 45-nanometers? I think we’re going to need some real invention by the time we get to that point.”
Rick Hill, president and CEO of Novellus, had a similar reaction. “When you get down to 22-nanometers, you have 220 Angstroms. If you figure the average diameter of an atom is 5 Angstroms, that’s giving you roughly 40 atomic layers. You don’t have much material to work with.”
One technology that has gotten some attention among researchers is self-assembly, but Hill said commercializing such an approach will be extremely difficult. “Typically you engineer that,” he said. “You don’t statistically hope it occurs. There are more self-aligned processes coming out that to replace machinery operating at this level, but this business isn’t going to change markedly from a manufacturing technology standpoint.”
Even deep in the research world, questions are rippling to the top about what happens after 22-nm. Ludo Deferm, VP of business development at IMEC in Leuven, Belgium, said that one of the main unknowns will be cost and who can afford it — something that could severely limit development of new chips.
“If you fund solutions and the cost is too high, will there still be a market and still be technologies?” Deferm asked. “What we’re finding is that 90-nanometers will be a cash cow longer than 180-nanometers was. And fabless companies may not ever scale down below 90-nanometers. They may decide they can cope with 90-nanometer technology. Fewer and fewer companies are using advanced technologies.”
Those companies that will stay on the bleeding edge are memory and processor companies, Deferm said. But he noted there is a fundamental shift underway, in which business is pulling technology rather than technology pushing business. He said it’s far too expensive to gamble on new technologies and techniques, so everyone requires more information before making a commitment. The problem is that beyond 22-nm, that information isn’t readily available.
Intel—perhaps alone—is confident it can develop techniques to make 15-nm processors. Paolo Gargini, Intel’s director of technology strategy, says that research typically takes 10 to 15 years to make its way into chips. He said 15-nm chips will likely include strain engineering, high k insulation, tri-gates and the integration of 3-5 group compounds.
But for many companies—particularly those with a more diverse set of chips and a far lower research budget—the decision may well come down to economics and leveraging partners. Texas Instruments CTO Hans Stork said his company’s research is not very far along at 22-nm. TI has just started on an early definition for 32-nm with its foundry partners TSMC and UMC.
“It is time to start making some serious investments in 32-nm, and we do not plan to make those internally,” Stork said. He added that TI will rely on its foundries to develop those specifications.
Likewise, Aart de Geus, chairman and CEO of EDA software tool supplier Synopsys, which works extremely closely with its chipmaker customers, says visibility at and beyond 22-nm is only theoretical at this point. Now the question is how quickly theory can be turned into reality.