Power-line networking demands holistic design

-July 21, 2006

For most engineers, it's a reflex: When a new problem emerges in a design, they attack it with added complexity. But there are times, especially in applications with extreme constraints, that this is the wrong approach—the design requirements have put the project in a box, and increased simplicity represents the only way out.

SiConnect chipSuch has been the experience of Swindon, UK, startup SiConnect in the nascent power-line-home-networking market. Here the constraints are fierce. Such a network must be capable of deterministically handling PCM audio, compressed audio, and compressed video, along with slower Internet Protocol-based data and network-management streams. It must deliver guaranteed QOS (quality of service) on media streams. It must be able to coexist with other home networks, because no solid standards exist. And it must be able not only to avoid arousing the interest of regulatory bodies but also to avoid being shut down by any of the myriad noise sources available to the power wiring in a home. And of course it must be virtually free—$5 per node appears to be the ceiling on silicon cost.

With sufficient technology, it's not impossible to tackle each of these issues. With enough bandwidth, a network can easily provide good QOS for a variety of packetized data types. Of course, that bandwidth will cost in terms of carrier frequency, modulation, and coding schemes, because the power-line medium in homes is notoriously irregular and noisy. Coexistence is no problem with a sufficiently powerful code-division multiplexing scheme. Engineers can solve radiated interference and noise immunity with a combination of extreme broadband, clever coding, and the avoidance of frequency bands that are sensitive or currently occupied.

Take all these things together and you have a recipe for a sophisticated, near-ultrawideband radio chip that happens to connect to a power-line interface instead of an antenna. The device will have powerful noise filters in a superb analog front end, loads of digital-signal-processing bandwidth to deal with the demanding dynamic OFDM (orthogonal-frequency-division-multiplexing) modulation scheme, and complex hardware to accelerate coding, FEC (forward error correction), and security. Perhaps it will be a state-of-the-art 90-nm chip.

But it's not going to come anywhere near the necessary cost point, and in fact, some data suggest that this approach may not reach adequate data throughput no matter how much DSP horsepower and bandwidth you throw at it.

Alternate modulation

All these considerations led SiConnect to look for another way. What if, instead of state-of-the-art OFDM, the company employed simple binary or quad phase-shift keying? And what if, instead of depending on spread-spectrum techniques to talk through noise, the interface just used frequency agility to dynamically move around the noise? In principle, the company's studies showed, it could work, delivering between 7 and 14 Mbps of usable data. But how to deal with the cost issue?

That question became a study in architecting for low cost, according to SiConnect chief technologist Peter Strong. Looking at the exponential cost of silicon with respect to process node, SiConnect decided to use as conservative a process as possible, and to take any reasonable means to minimize die area within that process. This decision would be reflected in network architecture, chip architecture, block implementation, and even hiring policy.

Unable to rely on either raw transmitter power or powerful modulation schemes, the network had to depend on agility. SiConnect laid out a self-reconfiguring network of peer nodes. These nodes continuously monitor the quality of links between themselves and create a map—dynamic in both frequency and topology—of best paths between nodes. As a node becomes difficult to reach, the network may route packets through another node acting as a repeater, move its carrier frequencies to avoid noise, eliminate frequencies that can't find clear space, and turn on both interleaving and FEC if necessary. "Remarkably, FEC is often not required in typical environments," Strong says.

The technique has proved robust against the veritable Taoist pantheon of monsters that beset the typical home's power-line network. External RF interference, the sudden appearance of long stubs, intense noise from electric motors, dimmer switches, and high-efficiency light bulbs all have their patterns, and all allow agile traffic to slip through.

At the chip level, cost savings became a primary theme. SiConnect's first major decision was to separate the analog front end from the digital functions. "We had done a previous chip with Philips that had included both," Strong says. But since that time Philips had changed its attitude toward the foundry business. It made more sense now to go with an off-the-shelf front-end from Analog Devices, and to focus the design budget on the digital portion.

The choice of a relatively simple modulation scheme operating at low, 3- to 30-MHz frequencies meant that the design would need no thundering and panting DSP core. SiConnect chose to implement baseband functions mostly as lean state machines, running on very few gates, very low power, and without the frequent intervention of a programmable CPU or DSP.

With that overhead removed, the design team looked hard at the pretty much de-facto CPU choice, the ARM-7. In fact, the division of labor between the baseband state machines and the CPU meant that a very carefully coded 64-MIPS 8051 core could do the job—and in a fraction of the space an ARM core would require. "It would have been nice to have an ARM-7," Strong admits, "but it wasn't necessary." The decision did not improve Strong's popularity among the software-development team, but it did save significant real estate. And it helped the chip to achieve sufficient performance from Chartered Semiconductor's vanilla 180-nm CMOS process. At the die size SiConnect reached, 180 nm actually proved less expensive per die than 130 nm.

Wanted: State-machine designers

Staffing policy evolved to reflect the company's architectural decisions as well. Strong found that engineers capable of efficient state-machine design were a lot thinner on the ground than when he began engineering a number of—well—decades ago. Hiring for the baseband section became an interesting project. More surprising, Strong said, was the difficulty of finding good C programmers for the 8051.

"We found that there are a great many C programmers," he says. "Most of them are not valuable when writing critical code for a small processor." Yet it was critical that the code for the 8051 exist in portable ANSI C and be modular and maintainable, because the code is likely to be ported to the embedded CPUs on customers' appliances.

SiConnect ended up putting a C programming test on its Web site as a screen for software applicants. "Only about one applicant in 10 passes it," Strong says. "It has been a valuable tool in finding the software people we want."

SiConnect's experience points to an enduring irony of the design discipline: When simplicity is the architectural answer to a design challenge, implementation takes the best people you can get. Thinking differently can unlock a design dilemma. But different thinking eventually permeates every facet of an engineering organization. As SiConnect awaits its first silicon, it is a company committed to, and bet upon, being that different.

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