MIT, TI develop proof-of-concept, energy-efficient microchip

-February 04, 2008

At the International Solid-State Circuits Conference (ISSCC) being held this week in San Francisco, researchers from Cambridge, Mass.-based Massachusetts Institute of Technology (MIT) and Dallas-headquartered Texas Instruments (TI) will unveil a portable electronics-focused chip design, that they believe is up to ten times more energy-efficient than present technology.

MIT and TI said they believe the technology could lead to cell phones, implantable medical devices and sensors that last far longer when running from a battery.

The design will be presented Tuesday by Joyce Kwong, a graduate student in MIT’s department of electrical engineering and computer science.

Kwong carried out the project with MIT colleagues Professor Anantha Chandrakasan, the Joseph F. and Nancy P. Keithley Professor of Electrical Engineering, and EECS graduate students Yogesh Ramadass and Naveen Verma along with TI colleagues Markus Koesler, Korbinian Huber and Hans Moormann. 

The team demonstrated the ultra-low power design techniques on TI’s MSP430 microcontroller at the MIT Microsystems Technology Laboratories, which Chandrakasan directs and who explained that the key to the improvement in energy efficiency was to find ways of making the circuits on the chip work at a voltage level much lower than usual. While most current chips operate at around 1 volt, the new design works at 0.3 volts.

However, reducing the operating voltage is not as simple as it might sound, because existing microchips have been optimized for many years to operate at the higher standard voltage level while memory and logic circuits have to be redesigned to operate at very low power supply voltages, Chandrakasan said.

One key to the new design was a DC-to-DC converter, which reduces the voltage to the lower level, right onto the chip, and is more efficient than having the converter as a separate component so that the redesigned memory and logic, along with the DC-to-DC converter, are all integrated to realize a complete system-on-a-chip solution.

Chandrakasan noted that one of the biggest problems the team had to overcome was the variability that occurs in typical chip manufacturing since at lower voltage levels, variations and imperfections in the silicon chip become more problematic; therefore designing the chip to minimize its vulnerability to such variations was a big part of the strategy.

The chip is currently a proof of concept with commercial applications possibly available in five years in a number of areas including portable and implantable medical devices, portable communications devices and networking devices.

The research said a variety of military applications could be possible for the production of tiny, self-contained sensor networks that could be dispersed in a battlefield.

Interestingly, in some applications, such as implantable medical devices, the researchers aim to make the power requirements so low that the chip could be powered by ambient energy, using the body's own heat or movement to provide the needed power. In addition, the technology could be suitable for body area networks or wirelessly-enabled body sensor networks, the researchers said.

Dr. Dennis Buss, chief scientist at TI concluded in a statement, “These design techniques show great potential for TI future low power IC products and applications including wireless terminals, RFID, battery-operated instrumentation, sensor networks, medical electronics and many others.”

The research was funded in part by a grant from the US Defense Advanced Research Projects Agency.

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