EDN's 18th Annual Innovation Awards Finalists
EDN Staff - February 1, 2008
&& PREVIOUS FINALIST | MAIN | NEXT FINALIST >> Category: Digital ICs, Memory, and Programmable Logic Finalist: MirrorBit Quad flash (Spansion) The bits-per-square-inch spec is the metric that drives every mass-storage supplier’s technology road map, regardless of whether the company’s products are magnetic, optical, or silicon. In 1996, Intel introduced the first flash-memory technology that housed two bits of information within each array-storage transistor. Now, Spansion ups the ante with its MirrorBit Quad approach, which reliably holds four bits of information within each array-storage transistor, resulting in silicon efficiency and to cost-per-bit savings at the IC level. Spansion’s MirrorBit cell differs significantly from a traditional floating-gate cell; it doubles the intrinsic storage capacity by storing two physically distinct charges on opposite sides of the transistor. MirrorBit Quad technology doubles the density of MirrorBit by adding the ability to store different charge quantities, or states, in each of the two locations. |
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The bits-per-square-inch spec is the metric that drives every mass-storage supplier’s technology road map, regardless of whether the company’s products are magnetic, optical, or silicon. In 1996, Intel introduced the first flash-memory technology that housed two bits of information within each array-storage transistor. Now, Spansion ups the ante with its MirrorBit Quad approach, which reliably holds four bits of information within each array-storage transistor, resulting in silicon efficiency and to cost-per-bit savings at the IC level. Spansion’s MirrorBit cell differs significantly from a traditional floating-gate cell; it doubles the intrinsic storage capacity by storing two physically distinct charges on opposite sides of the transistor. MirrorBit Quad technology doubles the density of MirrorBit by adding the ability to store different charge quantities, or states, in each of the two locations.
