EDN's 18th Annual Innovation Awards Finalists
EDN Staff - February 1, 2008
&& PREVIOUS FINALIST | MAIN | NEXT FINALIST >> Category: Development Kits Finalist: Nios II evaluation kit (Altera) The Altera Nios II Evaluation kit delivers FPGA-design capabilities for embedded systems. Combining a Cyclone III Starter Board and a touchscreen LCD in a plexiglass case, the Nios II evaluation kit allows developers to easily launch example applications such as networking and audio and image processing. The kit includes the Nios II embedded-design suite for embedded-software development, several tutorials, and design examples with full source code, easing software development for the Nios II processor. Features include a 3C25 FPGA with 25,000 logic elements, 32 Mbytes of DDR SDRAM, 1 Mbyte of SSRAM, a 16-Mbyte flash memory, and a 10/100-Mbps Ethernet PHY (physical) layer.The kit includes the Nios II embedded design suite for software development and several tutorials and design examples plus source code, making it easy to develop software for the Nios II processor. It also offers 10 design examples from Altera and several embedded partners, showcasing many of the unique benefits of designing with FPGAs. These examples include hardware acceleration of image-processing applications and a remote FPGA-update design that demonstrates how developers can update hardware designs over the Internet to add new product features or deliver bug fixes. |
|
Signal distortion from high-K ceramic capacitors
Simple reverse-polarity-protection circuit has no voltage drop
Two-IC circuit combines digital and analog signals to make multiplier circuit
Comparator-based buffer using a VVCCS
Why bypass caps make a difference - Part 1: How a regulator and its output capacitor can interact
Jim Williams: The light side and classic electronics art sculptures
Understanding the basics of setup and hold time
Signal distortion from high-K ceramic capacitors
Wideband fully differential amplifier noise improved using active match
Simple reverse-polarity-protection circuit has no voltage drop
Filter quashes 60-Hz interference
NE555 timer sparks low-cost voltage-to-frequency converter
ACE Awards Jim Williams Contributor of the Year: Steve Hageman
The Altera Nios II Evaluation kit delivers FPGA-design capabilities for embedded systems. Combining a Cyclone III Starter Board and a touchscreen LCD in a plexiglass case, the Nios II evaluation kit allows developers to easily launch example applications such as networking and audio and image processing. The kit includes the Nios II embedded-design suite for embedded-software development, several tutorials, and design examples with full source code, easing software development for the Nios II processor. Features include a 3C25 FPGA with 25,000 logic elements, 32 Mbytes of DDR SDRAM, 1 Mbyte of SSRAM, a 16-Mbyte flash memory, and a 10/100-Mbps Ethernet PHY (physical) layer.
