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EDN's 18th Annual Innovation Awards Finalists

- February 1, 2008



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Category: Development Kits
Finalist: Nios II evaluation kit (Altera)


The Altera Nios II Evaluation kit delivers FPGA-design capabilities for embedded systems. Combining a Cyclone III Starter Board and a touchscreen LCD in a plexiglass case, the Nios II evaluation kit allows developers to easily launch example applications such as networking and audio and image processing. The kit includes the Nios II embedded-design suite for embedded-software development, several tutorials, and design examples with full source code, easing software development for the Nios II processor. Features include a 3C25 FPGA with 25,000 logic elements, 32 Mbytes of DDR SDRAM, 1 Mbyte of SSRAM, a 16-Mbyte flash memory, and a 10/100-Mbps Ethernet PHY (physical) layer.

The kit includes the Nios II embedded design suite for software development and several tutorials and design examples plus source code, making it easy to develop software for the Nios II processor. It also offers 10 design examples from Altera and several embedded partners, showcasing many of the unique benefits of designing with FPGAs. These examples include hardware acceleration of image-processing applications and a remote FPGA-update design that demonstrates how developers can update hardware designs over the Internet to add new product features or deliver bug fixes.  

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