Mind the gap
Alex Romanelli, Electronic News, with additional reporting by Ed Sperling - September 1, 2003
There's a gap emerging between those who can afford to push beyond 90 nanometers and those who can't.
The chip behemoths—IBM, Intel, TI, Samsung, Toshiba and STMicroelectronics, among others—have much to gain from a drive to 65 nm, 45 nm and beyond, but second-tier companies are becoming more strategic in the face of rising economic costs. Much has been made of the drive toward the fabless model, but some companies are now examining the benefits of skipping the 65-nm node in favor of going straight to 45 nm—in direct opposition to the advice of industry analysts.
"If I were a betting man, I would say the industry is going to skip 65 nanometers and go straight to 45 nanometers. That's just because 90-nanometer designs are being implemented now and it's going to take us quite a while before we make our money back on it," says Dennis Monticelli, national fellow at National Semiconductor Corp., Santa Clara, CA. "By that time, 65-nanometer technology is going to be ready to go. If you can't get payback on the node you're working on now, 65-nanometer has gone by and 45-nanometer is in front of you by the time you're ready to invest again. A few big companies that are wedded to these large die sizes will make the half step to 65-nanometer. But how many will follow?"
According to analysts, it won't just be National that has done a 180-degree turn from its original plans to perform its own manufacturing. National now instead plans to continue designing at the leading edge while outsourcing manufacturing to Taiwan Semiconductor Manufacturing Company Ltd. (TSMC), Hsinchu Park, Taiwan. This kind of trend will be increasingly seen across second-tier vendors, according to Dean Freeman, principal analyst at San Jose-based Gartner Dataquest.
Analysts have cited LSI Logic, IDT and Cypress as other companies being forced to rethink and relinquish a once strong focus on manufacturing. "What you're already seeing at 90 nanometers—and you'll see it more at 65 nanometers—is a bifurcation of the industry," says Freeman. "You'll see integrated device manufacturers leading the charge to 90 nanometers and 65 nanometers and the others picking it up six to 12 months later. They'll rely on the foundries for state-of-the-art manufacturing technology, or they'll wait for it to get cheap enough that they can install it and ramp it up.
"If I were a betting man, I would say the industry is going to skip 65 nanometers and go straight to 45 nanometers."
—Dennis Monticelli, National Semiconductor
"This is one of the ways TSMC is going to be able to keep state-of-the-art manufacturing and keep up with the IDMs," Freeman says. "TSMC may not be bleeding-edge in process technology, but certainly it will be no more than three to six months behind in introducing the leading-edge technology to the industry. That way, it will be able to keep the current foundry model going."
Risto Puhakka, vice president of VLSI Research Inc., Santa Clara, CA, isn't as optimistic when it comes to the outsourcing model. "Outsourcing won't necessarily keep you on the leading edge," he says. "Foundries have their own share of problems, especially in Taiwan. Right now they're almost two years behind Intel or IBM." You have to ask yourself what capabilities you need—the capital requirements to run a 300-millimeter fab are enormous on your own.
Puhakka adds that a middle-ground method is cropping up between the major tier 1 players and those trapped in second gear. He points to AMD's strategy of partnering R&D with other midtier players. "Partner on basic R&D, and you can share half of your R&D expenses—that's a huge relief," he says.
But analysts agree that skipping 65 nm and going straight to 45 nm is not an option, no matter how you try to do it. "It's way too hard," Puhakka says. "Implementing the nodes is getting more and more difficult, and it is driven mainly by new materials. Going from 90 nanometers to 45 nanometers directly, you can have all sorts of interesting challenges with, for example, both low-k and high-k dielectric. You may encounter problems that you would have had some time to resolve if you had run into them at 65 nanometers."
The consequences of failure are dire. "What if you don't make it?" asks Puhakka. "What if you miss it by six months or a year? Then you're really dead in the water, because your manufacturing is four years behind."