Bringing Clarity to Chaos

The scope of and venue for the next-generation design debate will change significantly this week as Synopsys Inc. and CoWare Inc. unveil their initiative for a common C++ system modeling platform. More than 20 companies as of last Friday are on board, including large system houses like Sony and Ericsson who aren't a part of the more academic efforts.

Saying that "trying to convert hardware designers from Verilog to C is solving the wrong problem," the two companies are embarking on the "Open SystemC Initiative." They will give over SystemC, the class library that Synopsys developed in its R&D program called Scenery and CoWare has added to, to a Web-based community (at www.systemc.org) of agreeable developers.

In one sense, the release of code and Synopsys and CoWare's rallying of vendors is an end-run around the work of Open Verilog International's architectural language committee, which is the "EDA brain trust" conducting a formal review of several vendors' above-RT-level design approaches. Verilog is one of two hardware description languages (HDLs) that chip designers use to do their work; the other is VHDL and its standards body is conducting a similar evaluation.

Joachim Kunkel, vice president and general manager of the System Level Design group at Synopsys, said the market reality is system designers all over the world are already designing with home-grown C libraries and the entire industry - systems, silicon, and software - cannot move forward until this progression is defragmented. And this SystemC initiative is meant to gather all those parties and "democratically" solve the remaining development issues, like describing clocks or concurrency.

"Guido (Arnout, the president and chief executive officer of CoWare) puts it this way," said Brian Barrera, director of strategic marketing in Kunkel's group. "If you look back in EDA history, you see the precedent. In the '80s, it was the days of schematic capture and we lived under DMV ( Daisy Systems, Mentor Graphics and Valid Logic Systems, then the big three of EDA). Everyone had to bring out their little schematic libraries (for each) and it was time consuming and it cost more.

"Then, moving into the '90s, we went to RT level, and everyone had to release two sets of VHDL libraries for their tools. Moving into 2000, we want SystemC to be the one library that everybody knows and understands and develops around," Barrera said. "We're not saying that we are going to replace Verilog and VHDL. They are the foundation for the existing RT-to-silicon design flows. We say SystemC will be the foundation for the system-to-silicon design flow."

Wanting SystemC to be the one solution raises some ire though. CynApps Inc., the San Jose firm that John Sanguinetti founded, sees this as a challenge to its Cynlib library, which is also available for download and open source development.

"This is essentially a Synopsys attempt to control this area. They want to establish a standard C++ class library so there won't be a format war like there has been with Verilog and VHDL. This is an admirable goal and one that we support," Sanguinetti said Friday.

"The problem is that they think theirs is the best library, and they are not particularly interested in having it evolve to meet real needs. SystemC was developed within Synopsys and it has a number of problems, which have not been addressed in a real-world environment. Interestingly, they have been asking people like Cadence and Mentor to endorse SystemC sight unseen. Both of them have declined, I believe.

"They are taking a very different approach to 'openness' than we are, making it very explicit that they will control any modifications to the library," he said.

But Barrera says EDA vendors have complete access to the SystemC modeling platform required to build interoperable tools. There are no licensing fees associated with the use of SystemC and any company is free to join and participate. The goal is a foundation to build a market on, and a steering group that includes ARM Ltd. and Lucent Technologies Inc. is to provide "an environment of structured innovation ensuring that interoperability is retained for the benefit of all."

Synopsys and CoWare are confident of their market muscle in this area and they seem to have reason to be. Synopsys' initial development in the area started five years ago with the acquisition of a small German house called Cadis, Kunkel said. CoWare has had significant market success with its RTC tool for designing with C++.

"Everyone knows a design paradigm shift is approaching, but many semiconductor and IP companies are hanging back until a common approach emerges for exchanging models. Now, with the development of a common platform, there are no barriers," Arnout of CoWare said.

Aart de Geus, chairman and CEO of Synopsys, went further.

"We are bringing clarity to the chaos that prevails in the system-level design language world today and simultaneously opening up a whole new realm of opportunities," de Geus said. The initiative is championing interoperability at the beginning of this market, and SystemC is the right solution, he said.