Synopsys snaps up Virage Logic

EDA giant Synopsys announced this morning an agreement to acquire IP vendor Virage Logic. In the transaction, expected to close in Synopsys's fiscal Q4 ending in October, Synopsys intends to purchase publicly held Virage's outstanding shares at $12 per share, approximately a 28% premium over yesterday's closing price of $9.37. The cash transaction will cost Synopsys approximately $289 million, net of Virage Logic's cash on hand.

Following the May acquisition of Virage competitor Denali Software by Cadence, the deal represents just about the completion of the consolidating-away of the physical IP business. Earlier, ARM had acquired the third primary player in the business, Artisan Components. There will now be essentially no independent companies producing logic libraries, memory compilers, and complex interface IP for use in chip designs.

Synopsys Solutions Group Senior Vice President and General Manager Joachim Kunkel emphasized the benefits of the acquisition as a complement to the existing Synopsys portfolio. "We have focused over the last 15 years on building the kinds of IP blocks that everyone needs in their designs: standard interfaces, for instance," Kunkel said. "More recently, I think we have been rather advanced in extending this notion to analog IP, finding analog building blocks that are in fact widely useful. Virage's strong portfolio of embedded memory IP fits perfectly into this strategy, as IP that is widely used and yet differentiated."

Virage also has a logic-cell library business, although it is much smaller than the memory business, Kunkel said. In addition, Virage had lately begun to expand into high-speed interface IP. Just what the fate of the interface IP and logic library groups will be after the acquisition remains to be seen.

Kunkel added that there were strong financial incentives for the acquisition. The IP business has significant fixed costs, including development, process-targeting, and applications engineering teams and a verification infrastructure. The ability to spread these costs across a wider product line will improve margins, Kunkel suggested. This could well mean that Synopsys plans to eliminate redundant engineering resources after the acquisition, as well as the customary trimming of marketing, sales, and administration positions.

That indirect margin benefit will probably be more significant to Synopsys at least in the short term, as the entire IP business has taken a severe battering in the recession. Virage, for example, after more than doubling its quarterly revenue year-on-year, was still showing an EBITDA of -$6 million on the most recent quarter. Synopsys, optimistically perhaps, expects the acquisition to be accretive to non-GAAP earnings in 2011.

More interesting might be the competitive position in which the acquisition will place Synopsys. With Virage, Synopsys' IP offerings will have similar breadth to those of Cadence. But from another point of view, Virage products compete directly against those of ARM: both in the processor space, with Virage's recently acquired ARC CPU cores, and more directly with logic libraries and embedded memory facing ARM's physical IP group. Yet ARM is a vital partner to Synopsys in the area of CPU IP.

Further, giant foundry TSMC has shown considerable aggressiveness moving into the logic library space in recent process generations, arguing that TSMC customers needed early access to foundry-approved logic libraries. The relationship between TSMC and Synopsys in the complex tangle of information flows that pass between the foundry, the EDA tool developers, and the library and memory compiler developers could get even more complex with the joining of Synopsys and Virage.