Clock-circuit-design tool recovers engineer time
By Jeff Berman, News Editor - August 23, 2005
Analog Devices today rolled out three new clock ICs and a simulation tool that aims to accelerate the design and analysis of clock circuits for various applications, including wireless transceivers, broadband-infrastructure equipment, general instrumentation, and automated test equipment.
Dubbed ADIsimCLK, the tool includes tutorials, design wizards, reference designs, a VCO/VXO library, PLL design, loop-filter design, and models. The tool gives engineers the ability to quickly design robust and accurate timing circuits, according to the company. "This allows designers to make design decisions at workstations, without having to hook up evaluation boards and rely on lengthy data sheets," said Scott Behrhorst, product marketing manager.
ADIsimCLK addresses several common facets of clock-circuit design such as speed, edge skew, jitter, and phase noise, as well as less obvious factors like external oscillators, slew rate, channel isolation, and RF interference. Analog Devices claims the tool is the first capable of simulating jitter less than 1 psec rms and phase noise less than –150 dBc/Hz.
"It gives you the ability to predict if the clock you are using is efficient enough to provide the performance you need," Behrhorst said. "And it offers comparison interfaces between one clock chip and another through differential LVPECL [low-voltage positive emitter coupled logic] for chip-to-chip signaling, which provide indications of what is and is not performing well."
The clock ICs introduced today are the AD9513, AD9514, AD9515, which join devices initially rolled out in December. The new ICs are pin-programmable and offer high integration in small packages, thereby reducing the need for multiple discrete components, saving board space, and significantly reducing bill-of-materials costs, according to the company.
The AD9514 and AD9515 support output clock rates up to 1.6 GHz, while the AD9513 supports 800 MHz. The AD9513 has three LVDS/CMOS outputs, while the AD9514 has two LVPECL outputs and one LVDS/CMOS output, and the AD9515 has one LVPECL output and one LVDS/CMOS output. The ICs come packaged in 32-lead LFSCPs (lead frame chip scale packages), feature additive jitter of less than 300 fsec (femtoseconds) rms, and can be placed in close proximity to devices requiring clocks.
The devices use their four-level logic pins for programming divide ratios, phase offsets, delays, and output logic levels, and the ICs require no serial interface ports.
ADIsimCLK is available for free download. The AD9514 and AD9515 are in production now, while the AD9513 is sampling and will go into production by the end of this month. The AD9513 and AD9514 are priced at $5.95 (1000), while the AD9515 is priced at $4.75 (1000).