Dual ARM Cortex-A9 MPCore features 28-nm, low-power programmable logic for high-end embedded systems

Mike Demler, Technical Editor - March 17, 2011

The new Xilinx Zynq-7000 family of EPP (extensible-processing-platform) devices targets high-end embedded-system applications, such as video surveillance, automotive driver assistance, next-generation wireless, and factory automation. The portfolio comprises four devices, each integrating a complete ARM Cortex-A9 MPCore-processor-based system with 28,000 to 235,000 cells of 28-nm, low-power programmable logic, the equivalent of 430,000 to 3.5 million ASIC gates.

The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model. In a typical FPGA-centric development flow, engineers create their designs in HDLs (hardware- description languages), such as Verilog and VHDL (VHSIC HDL). Zynq supports a software-centric flow, in which developers work almost exclusively in high-level languages, such as C and C++. For software developers, the Zynq-7000 appears the same as a standard, fully featured ARM processor-based SOC (system on chip) that boots immediately at power-up and can run a variety of operating systems independently of the programmable logic.

Xilinx integrates dual ARM Cortex-A9 MPCore with 28-nm, low-power programmable logic image

Each Zynq-7000 EPP device embeds a dual 800-MHz ARM Cortex-A9 MPCore with a dedicated Neon coprocessor for media and signal processing that adds instructions for audio, video, 3-D graphics, and image and speech processing, along with a double-precision FPU (floating-point unit). The hard-wired processing system includes L1 and L2 caches, memory controllers, and commonly used peripherals. The devices integrate dual 12-bit AD Cs that support sampling rates as high as 1M samples/sec on as many as 17 external-input analog channels.

The two largest devices in the Zynq family, the Zynq-7030 and Zynq-7040, have built-in multigigabit transceivers that operate as fast as 10.3125 Gbps and dedicated DSP resources that deliver 480 and 912 GMACS (billion multiply/accumulate operations per second) of peak performance, respectively. The two smaller devices, the Zynq-7010 and Zynq-7020, provide as much as 58 and 158 GMACS of peak DSP performance, respectively.

The EPP enables system architects, logic designers, and software developers to work in parallel within their familiar programming environments. System architects and software developers can initially define the system from the software perspective before determining what functions need offloading or acceleration in hardware. Software developers can leverage the Eclipse environment; Xilinx Platform Studio SDK (software-development kit); ARM Development Studio 5; ARM RealView Development Suite; and compilers, debuggers, and applications from vendors in the ARM Connected Community and Xilinx Alliance Program. These vendors include Lauterbach, Wind River, PetaLogix, The MathWorks, Mentor Graphics, Micrium, and MontaVista.

A tight coupling of the processor system and programmable logic enables hardware/ software co-design through AMBA-AXI (Advanced Microcontroller Bus Architecture-Advanced Extensible Interface) interconnects. The AMBA interfaces allow software developers to extract programmable logic as memory-mapped calls and to make more than 3000 internal connections to the programmable fabric. Configuration control allows for the creation of adaptive systems, in which developers can reprogram parts of the programmable logic through software to meet varying system operating environments. Hardware engineers can design the Zynq-7000 programmable fabric by using Xilinx’s ISE (integratedsoftware- environment) design suite, which includes development tools and AMBA4 AXI4 plug-and-play IP (intellectual property) and BFMs (bus-functional models) to accelerate design and verification.

Customers can start evaluating the Zynq-7000 family by joining the Xilinx Early Access program, which Xilinx has limited to 100 participants. The company plans to release its first silicon devices for the second half of 2011, and engineering samples should become available in the first half of 2012. Prices vary, depending upon volume and device. Prices for the 7000 family will start at less than $15 (high volumes). A design kit will be available for $495.

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