Verification platform boosts performance, productivity
Along with its core performance enhancements, the upgraded Palladium platform is designed to work more effectively within the Cadence Systems Development Suite to speed hardware and software verification. Within the expanded Systems Development Suite, Cadence has leveraged its patent-pending hybrid technology to combine its Virtual System Platform (VSP) and Palladium series to boost embedded OS verification by 60x and boost hardware/software verification by 10x. The 60x speed-up in embedded OS verification derives from the Systems Development Suite's ability to synchronize a hardware/software verification run that combines software running at speed on the host with models requiring greater accuracy running on the emulator.
The enhancements also enable the Suite's new embedded test bench capability, allowing designers to verify peripheral software drivers prior to tape-out. Here, the Suite virtualizes elements in the system environment that interface to the SoC and maintains virtual models in the emulator - allowing verification of software before silicon becomes available. The result is an ability to balance speed and accuracy, enabling faster and smoother bring-up of complex hardware/software designs.
In addition, the new model offers accelerated connections with the Cadence Incisive Functional Verification Platform with added protocols including HDMI and PCIe, among others. In addition, the new models includes an improved dynamic power analysis that supports 3x faster generation of toggle information and efficient power event logging capability.
The Palladium XP II will be available in Q4 of this year with upgrade options for existing Palladium XP installations.
For more information, visit the Cadence Palladium XP II product page or download the technical brief.