Design Con 2015

Software eases interconnect analysis of ARM-based SoCs

-October 30, 2013

Interconnect Workbench from Cadence provides interconnect performance analysis and verification of SoC (system-on-chip) devices incorporating ARM CoreLink CCI-400, NIC-400, NIC-301, and ADB-400 system intellectual property (IP). The software tool identifies design issues under critical traffic conditions and delivers cycle-accurate analysis that enables users to make tradeoffs and enhance their designs.

Interconnect Workbench works in conjunction with Interconnect Validator to form a complete functional-verification and performance-validation platform. By automatically generating a performance-analysis testbench that incorporates Interconnect Validator and a complete suite of ARM AMBA verification IP, design teams can reduce the time and effort typically required to create a test environment. System architects can experiment with different scenarios and consider tradeoffs that impact throughput, latency, and bandwidth. Users can even compare potential architectures side by side on one screen.

Interconnect Workbench product page

Cadence Design Systems, www.cadence.com

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