Software eases interconnect analysis of ARM-based SoCs
Interconnect Workbench works in conjunction with Interconnect Validator to form a complete functional-verification and performance-validation platform. By automatically generating a performance-analysis testbench that incorporates Interconnect Validator and a complete suite of ARM AMBA verification IP, design teams can reduce the time and effort typically required to create a test environment. System architects can experiment with different scenarios and consider tradeoffs that impact throughput, latency, and bandwidth. Users can even compare potential architectures side by side on one screen.
Interconnect Workbench product page
Cadence Design Systems, www.cadence.com
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