Events

Interconnect Process Integration

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today’s chips contain hundreds of millions of transistors.

Location: San Jose, CA
Date: 10/31/2008 - 10/31/2008
Organizer: Semitracks, Inc.

This 1-day course discusses advanced issues related to dielectric and interconnect integration for today’s high performance processes. Topics include damascene processing, trench liners for copper interconnect, capping layers for copper, etch stop materials and more. The instructor will talk extensively on the variety of low dielectric constant materials being considered and in use in today’s ICs. He will discuss their advantages, disadvantages, and integration challenges.

Event Link:http://www.semitracks.com/courses/inter-process-int-course.htm

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