Aldec® and Zuken: Pin Synchronization for Smooth Integration of PCB and FPGA Development Environments

Aldec and Zuken developed a smooth synchronization between Aldec Active-HDL/CADSTAR FPGA and Zuken CADSTAR SCM/PCB offering complete support for all FPGA vendors from design creation to mixed VHDL and Verilog simulation, project management, schematic and PCB layout. This seminar includes a design demonstration and presentation on how to use Aldec Active HDL /CADSTAR FPGA and Zuken CADSTAR SCM/PCB in a unified environment.

Location: Online: 11:00 AM PDT
Date: 10/16/2008 - 10/16/2008
Organizer: Aldec and Zuken

Agenda:
• Introduction
• FPGA-PCB Concurrent design flow
• Aldec for complete FPGA design and verification
• CADSTAR for complete PCB layout and design
• Pin file Integration
• Design Demonstration

Event Link:http://www.aldec.com/Events/Event.aspx?companyeventid=38