Algorithmic shootout in Barcelona

For the past five years or so, Mobile World Congress in Barcelona has been the place to see mano a mano competition between FPGAs and DSPs for signal-processing algorithm dominance in 3G and 4G baseband networks. It should surprise no one that FPGAs are more prevalent at each succeeding MWC show. With the congress still a week away, Xilinx issued a release early Feb. 8 spotlighting woa new Targeted Design Platforms for mobile radio (for multimode radio and LTE baseband, respectively), and a number of design-ins for Virtex-6.

Yet the issue is not as simple as seeing which ...Read More

Sometimes either/or becomes both/and

We often point to applications where an FPGA has taken the place of a DSP or network processor, so it’s interesting to note those cases where the FPGA is used alongside both a multicore NPU and a DSP. It’s no surprise that it would turn up in a modular approach to 4G basestations. In the example to be unveiled at Mobile World Congress in Barcelona, CommAgility is showing off an Advanced Mezzanine Card that uses a Wintegra 12-core WinPath3 for baseband datapath and control functions, dual TI TCI6487 DSPs for implementing a 2 x 2 ...Read More

NuPGA: Back to the antifuse!

R. Colin Johnson at EE Times provided us some more details of the NuPGA architecture from serial ASIC pioneer Zvi Or-Bach. Guess what? All the pondering last summer about graphene-based memory patents at NuPGA was just a sideshow. The company’s real claim to fame is to go back to an antifuse-based programming element, the same concept that provided Actel Corp.'s claim to fame, and made Actel's products popular in radiation-tolerant mil-aero accounts.  In NuPGA's case, the antifuse element is implemented in a 3D configuration to minimize the inherent real-estate problems with antifuses.

To...Read More

Semantics, or a real Hardcopy shift?

Graham Pitcher of New Electronics caught up with David Greenfield of Altera’s Hardcopy business unit for an all-too-brief interview published Feb. 1, one that raises as many questions as it answers. Greenfield was elaborating on the target-market potential of Altera's new Embedded Hardcopy Blocks, specific to 28-nm processes.  I completely agree with Greenfield’s contention that a quick-configure ASIC-replacement FPGA like Hardcopy could virtually eliminate many ASSPs, or at least smaller ASICs that sweep up glue logic. And communic...Read More