Analyst Loring Wirbel covers programmable logic from an application perspective, providing a sneak peek at the vertical applications that help drive FPGA complexity, performance, and density. The blog will feature videos allowing engineers to spotlight their latest designs, along with news of products and corporate trends at FPGA vendors and the developers of third-party tools for programmable logic.

HPC programmability at SC09, Part 2

Posted by Loring Wirbel on November 19, 2009

FPGAs are more commonplace in Portland this week than I thought. The last FPGA Gurus post described Convey Computer’s presence at the SC09 conference in Portland, and how supercomputers might see greater competition from configurable board-level products as they migrate down from MIMD monster size to simple rack-mounted hybrid systems.

Turns out another exhibitor at the high-performance computing show is Nallatech, which is showing off the latest two members of its family of COTS PCI Express boards, the newest using the ...Read More

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Convey touts a "both-and" approach for HPC

Posted by Loring Wirbel on November 18, 2009

Remember Convex Computer Corp.? The Richardson, Texas company helped put Vitesse Semiconductor Corp. and gallium-arsenide ASICs on the map in the late 1980s, by using III-V-based gate arrays in a supercomputer. Now, of course, Vitesse is still around (albeit as a CMOS house), but Convex was swallowed by Hewlett-Packard in 1995, GaAs is relegated to a few small tasks, ASICs are waning away, and the supercomputer as commonly defined has given way to the High-Performance Computing (HPC) world of systems that are usually rack-based inhabitants of server data centers.

Some of the Convex founders (Steve Wallach and Bruce Toal, primarily) stayed in Richardson and launched ...Read More

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Two make a trend

Posted by Loring Wirbel on November 13, 2009

Remember last summer, when we pointed out the role Stratix FPGAs were playing in a new Xtreme Data platform intended for high-frequency trading? Don’t look now, but Chip Design magazine has just found another example of FPGAs in near-real-time financial analysis. Pico Computing and ET International are claiming a 100x speed-up in Value-at-Risk computations, through parallelizing the algorithms in FPGAs. (While the story does not identify the FPGA, most Pico PCI Express cards are based on Virtex family members.)

In this case, ETi and Pico Computing claim they are lessening risk by using m...Read More

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The hazards of a software grab

Posted by Loring Wirbel on November 11, 2009

Why should a swallowing of MontaVista Software by Cavium bother anyone in the FPGA community? Well, does the end result of Intel-Wind River strike fear in your heart? Does anyone remember LVL7 before they went inside Broadcom? How about poor NetPlane Systems, being bounced between Conexant and Motorola Computer Group?

Cavium is a cool company, and I’m sure they’ll put MontaVista’s software to good use in their communication processors. But that is at once the advantage and the problem. ...Read More

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Lattice sticks with open RISC

Posted by Loring Wirbel on November 10, 2009

Most of the attention in the release on Lattice Semiconductor’s Version 8.0 of ispLEVER was on the software’s expansion of DDR support – all well and good, mind you, given the expansion of DDR2 in the embedded space. But I was more interested in the expansion of the RISC Lattice Mico32 development system. The environment now includes a newer version of a GNU compiler, and a triple-speed MAC IP core.  Lattice also announced it would be ...Read More

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Frame grabbers at Vision 2009

Posted by Loring Wirbel on November 9, 2009

In the past, when we’ve talked about conferences for video processing and high-speed graphics, they’ve tended toward the likes of SIGGRAPH or the International Broadcasting Conference. With FPGAs moving more into industrial applications of video, with higher-speed networks than factory floors employed in the past, it’s time to pay more attention to the likes of Vision 2009, the Stuttgart conference on machine vision.

This week, Matrox is coming to Vision with an extension of its ...Read More

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Stratix IV visits Fort Meade

Posted by Loring Wirbel on November 5, 2009

You knew, didn’t you, that when we began writing about the predominant role FPGAs were playing in crypto, they’d be showing up post haste at the doors of the National Security Agency at Fort Meade, Md. Well, Altera Corp.’s Stratix IV is there, courtesy of a KG-530 Sonet encryptor built by General Dynamics’ C4 Systems division.  (The original version of this story listed Cyclone IV, which made less sense, as Andy points out below, and was the result of a GCN transposition rather than a GD mistake - Altera corrected this one for us.)

William Jackson of Government Computer News ...Read More

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Display plays begin with Hong Kong research

Posted by Loring Wirbel on November 3, 2009

FPGAs are commonplace in video processing platforms these days, but we’ve been expecting them to show up the display-control segments of higher-end digital television platforms as well. Some of the first examples may be showing up, as evidenced by Hong Kong Applied Science and Technology Research Institute’s (ASTRI) use of the Xilinx Spartan-3A for dynamic LED backlighting control.

ASTRI is using the platform as a means of demonstrating the use of LEDs in LCDs for greater contrast and for lowering power consumption. C.J. Tsai, director of the LED program at ASTRI, said that FPGAs carry the advantage of being able to tailor the characteristics of LED control for the power and performance of particular customers.

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Virtex, Spartan snare dual crypto design win

Posted by Loring Wirbel on October 29, 2009

Xilinx’s Virtex-5 and Spartan-3 have both been chosen in a reference design for a cryptographic module. Japan’s National Institute of Advanced Industrial Science and Technology (AIST) will use the two FPGA architectures in the SASEBO-GII board, which the government agency will promote for cryptographic testing, according to Xilinx’s Japan subsidiary Xilinx KK.

In some senses, the design was no surprise, since SASEBO-G was based on the Virtex-II. But since the second generation reference design wa...Read More

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Gene sequencing on the Virtex-5

Posted by Loring Wirbel on October 28, 2009

And now for something completely different: According to the online genome-sequencing news site, Sequence, Stone Ridge Technology Inc. of Bel Air, MD has been awarded $150,000 from the National Science Foundation for a 2010 study of using reconfigurability in a bioinformatics test to perform first-stage alignment and mapping in gene-sequencing studies. Stone Ridge believes that by implementing an open-source dedicated algorithm on dual FPGAs, a PCI Express board would be able to perform first-stage sequencing 50 to 100 times faster than hardware based on a standard integer CPU.

While Stone Ridge has not indicated how closely the special-purpose platform will resemble its standard reconfigurable single-board computer, the company’s ...Read More

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CommAgility's double-whammy

Posted by Loring Wirbel on October 27, 2009

Doomsayers may call the Advanced Telecommunications Computing Architecture dead in the water, but at least one vendor at this week’s ATCA Summit wasn’t ready to throw in the towel. CommAgility gave the world a double whammy of Virtex-5-based designs, one for general Advanced Mezzanine Card use, including one aimed specifically at fiber-based 10-Gbit links for wireless backhaul.

The AMC-V5Fe is distinguished by marrying the Virtex-5 with a high-speed 4x PCI Express interface, and dual Gigabit...Read More

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Putting an FPGA in the RRH chain

Posted by Loring Wirbel on October 26, 2009

It may not be news to place an FPGA close to an IF/RF interface in a handheld or base station design, but Lattice Semiconductor Corp. has taken integration a step further this week. The company announced on Oct. 26 a collaborative project with Affarii Technologies Ltd. on development of an integrated Remote Radio Head (RRH).

We have seen a handful of designs in Multiple-Input/Multiple-Output systems, used in WiMax access points and software-defined 4G base stations, in which an FPGA of a Virtex or Stratix class is used close to the antenna. Lattice’s innovation  was to leverage the expertise of Affarri to develop a more c...Read More

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