Loose threads and blank slates
posted by Loring Wirbel on 07/16/2009 | comments 1
I need to point everyone to the recent EE Times print and online overview of FPGA startups. Dylan McGrath and company examine those in prototyping or near-production who might have a good chance at making a go of it, such as Achronix Semiconductor Corp., and those who are in jeopardy of going away for good, like CSwitch Corp.. I want to stress the positive case that there are still good ideas out there, most notably at the two companies that said the least to EE Times, Tabula Inc. and Tier Logic Inc. But it’s important to point this out with a heavy degree of skepticism. When startups are in stealth mode, they may be protecting patents before a major product launch. But they also can be generating hype while not demonstrating whether their concepts are realizable in silicon.
Tabula, with a CEO from Matrix Semiconductor and Xilinx, and a CTO from Cadence Design Systems, has been generating press since 2005. It is working on what it calls a revolutionary form of programmable logic that can reconfigure itself according to new design inputs in a time slice faster than the system clock. Tabula appears to be examining some parallelism in its architecture, though its reconfigurable concepts may march down a path where rapid-reconfiguration tried and failed around the turn of the century. The fact that Tabula is hiring test engineers may indicate there is something behind the magic curtain, but the pressure will be on to stand and deliver in the next few quarters.
Tier Logic has indicated in public that it plans to offer an architecture with lower power dissipation and lower unit costs than competing FPGA architectures, by relying on some form of 3D structure for partitioning logic across layers of a design. If its semiconductor foundry partners can demonstrate the ability to produce such unique structures in high volume, Tier Logic still may have a differentiated wrinkle to bring to the FPGA party. I’m happy to see that there are still radically new FPGA architectures out there waiting to be revealed. But I also agree with McGrath at EE Times and Jag Bolaria of Linley Group: the recession has increased the pressure on startups to prove their concepts before they burn through their current rounds of venture funding.
Reader Comments
at 1/27/2010 3:50:15 PM, UFCRuleZ said:
Pretty cool site you've got here. Thanks for it. I like such topics and everything connected to this matter. BTW, why don't you change design :).
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