Analyst Loring Wirbel covers programmable logic from an application perspective, providing a sneak peek at the vertical applications that help drive FPGA complexity, performance, and density. The blog will feature videos allowing engineers to spotlight their latest designs, along with news of products and corporate trends at FPGA vendors and the developers of third-party tools for programmable logic.

Monday, December 29, 2008

Awakenings in a bleak midwinter

Dec 29 2008 10:35AM | Permalink | Email this | Comments (2) |
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One common image used to represent the semiconductor industry (and most technology sectors) since the beginning of the Big Freeze has been that of the hibernating bear. If we’re in the middle of a bear market, it certainly is appropriate to let Yogi sleep the clock around. And if this recession ends up lasting the better part of two years, a good sleep may just what is required to keep the bear from getting grumpy. Unfortunately, a programmable-logic industry that enters suspended animation does no one much good. Fortunately, there are indications that not everyone plans to spend 2009 in slumber.

Believe it or not, there are still hardware and application-software startups in the FPGA realm who are toughing their way through a funding drought. For example, we can expect Tier Logic, the company formerly known as Viciciv Technology, to show off some performance results for new architectures in 2009. Among the market leaders, Xilinx Inc. plans a media day for analysts and journalists in late January, to set the stage for product family enhancements in the year ahead.

When Altera CEO John Daane was interviewed in India last month, he suggested that a downturn might represent an opportunity to replace more ASSPs and ASICs with FPGAs, and that his company might weather the storm. Was Daane guilty of irrational exuberance? Perhaps. But maybe he was recognizing something about recession-induced slumber that everyone in the FPGA industry should take to heart: You snooze, you lose.

Reader Comments



at 12/30/2008 9:23:43 AM, BT said:
Many companies are looking to replace ASSP and ASIC with FPGA. This is low investment and quick time to maket strategy. Also, with the latest FPGA products - cost and performance are much less of an issue.



at 1/5/2009 5:55:32 PM, Mr X said:
LOL - BT sounds like he works for Altera.

Replacing ASSP with an FPGA is an FPGA-maker's fantasy. Same goes for replacing an existing ASIC - the funds are sunk.

FPGAs have a lot of power dissipation and silicon baggage for the number of gates you get; the price of flexibility and time to market.


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