2008 EDN DSP Directory By Robert Cravotta, Technical Editor Peel away the layers of complexity and find the perfect digital-signal processor for your project using our comprehensive listing of digital-signal-processing resources, including software-programmable processors, programmable fabrics, IP (intellectual-property) blocks, and digital-signal controllers.
RF Engines cores and SOC designs primarily target Xilinx and Altera FPGAs for applications in wireless-communications systems, electronic warfare, spectrum analysis, and medical instrumentation. The standard range of cores includes the HyperSpeed cores for applications requiring 6.4G-sample/sec performance. The HyperLength cores support a 1 million-point transform running at complex sample rates as high as 200M samples/sec on a Xilinx Virtex II 3000. The Matrix cores include a set of different-length DFT (discrete-Fourier-transform) cores that combine to allow the configuration of an FFT (fast Fourier transform) to match the number of points an application requires.
The ChannelCore64 can extract as many as 64 narrowband channels from one or two wideband ADC inputs. The PFT (pipelined-frequency transform) multichannel filter bank targets use in real-time applications. The Polyphase DFT, or WOLA (weighted overlap and add), is a method of implementing a uniformly distributed multichannel filter bank. The tunable PFT supports on-the-fly reconfiguration to any frequency plan as a digital front-end for the telecommunications, defense, and instrumentation markets. The SpectraChip cores provide a digital replacement for analog intermediate-frequency filtering; the digital implementation includes standard features, such as resolution-bandwidth filtering, video-bandwidth filtering, and conversion to log power.
2008 EDN DSP Directory