Extend the input range of a low-dropout regulator
Jeff Falin, Texas Instruments, Dallas, TX -- 10/17/2002
Because of process limitations, all ICs have an input-voltage limitation. This limitation can be cumbersome when you try to step down a high supply voltage to a lower, regulated voltage using a dc/dc converter, such as a linear regulator. Adding a FET to the input of a linear regulator creates a dc/dc converter with a wider input-voltage range than the range of the regulator alone. The excess voltage and, therefore, power occurs in the FET.
Figure 1 shows an IRF7601 n-channel MOSFET on the input of a TPS79228 2.8V, 100-mA, low-noise, high-power-supply rejection ratio low-dropout regulator. R1 and R2 provide a bias voltage to the gate of the MOSFET, and the load current determines the voltage at the source of the MOSFET. (In other words, the FET's on-resistance adjusts to accommodate the load current.) In this example, the maximum power-supply voltage is 15V, but the TPS79228 has a maximum recommended operating input voltage of 5.5V, so this design uses a MOSFET with a 20V breakdown voltage.
To determine the minimum bias voltage for the gate of the MOSFET, you need the MOSFET's drain-current, ID,-versus-gate-source voltage, VGS, data-sheet curves. For the IRF7601, the curves indicate that the device needs VGS slightly below 1.5V for 100-mA output current. Because the maximum dropout voltage of the regulator is 100 mV at 100 mA, the regulator's input voltage must stay above 2.9V. Therefore, you must bias the gate of the MOSFET to at least 1.5V+2.9V=4.4V. Thus, when the MOSFET provides 100 mA, its source voltage does not drop below 2.9V. The maximum gate-bias voltage is simply the maximum recommended operating voltage for the regulator, or 5.5V. This voltage provides more than enough gate drive to provide the regulator's 1 µA of quiescent current during shutdown mode. Although you can bias the gate between 4.4 and 5.5V, this design uses a bias voltage of 5V to account for variations in the threshold voltage. Maximum power dissipation for the FET is 100 mA×(15V–2.9V)=1.21W. The IRF7601, in a Micro 8 package, can handle this power figure at an ambient temperature of 55°C.
Is this the best Design Idea in this issue? Select at www.edn.com.
© 2009, Reed Business Information, a division of Reed Elsevier Inc. All Rights Reserved.

