Simplify worst-case PSpice simulations with customized measurement expressions

During IC design, worst-case simulations help designers account for variations in characteristics of PNP and NPN transistors and base and polysilicon resistors. These four classes of devices alone produce more than 16 combinations of simulation conditions. To accommodate temperature variations, each combination undergoes simulation at –40, +27 (room temperature), and +125°C, producing at least 48 series of data to analyze when simulations are complete. To help an IC designer evaluate simulated waveforms' characteristics, PSpice provides a library of ready-to-use, predefined measurements, including bandwidth, gain/phase margins, and more. PSpice also allows a designer to use predefined YatX and XatNthY measurements to measure a waveform's y value at a given x value—usually, time—and to find an x value that corresponds to the nth instance of a given y value (Reference 1).

However, when a designer must measure the value of Waveform 1 when Waveform 2 crosses a certain y value, predefined measurements do not apply because, unlike many programming languages, PSpice allows no embedment. This Design Idea describes how to create a customized PSpice measurement expression that solves the problem. As Listing 1 shows, the measurement expression itself is straightforward. Line 1 finds the X_value (x1) when Trace 1 crosses the y1_value for the nth positive slope. Line 2, denoted by braces { } at the bottom of the listing, searches for the value of Trace 2 (y2) at x1. Similarly, Listing 2 shows how a designer can create a measurement expression to find a y2 value when Trace 1 crosses a y1_value for the nth negative slope or when Trace 1 crosses a given percentage of its full y-axis range.

Figure 1 shows a simulation example in which the input and the output voltages represent a comparator's input and output, respectively. When the input voltage is greater than the positive threshold voltage, then the output voltage is high; when the input voltage is less than the negative threshold voltage, the output voltage is low. Using customized measurement expressions, a designer can easily find the rising and falling thresholds and the comparator's hysteresis voltage for all conditions immediately after the probe data becomes available. If any condition exists in which the threshold doesn't meet the design specification, the designer can then go directly to that condition and spend time on further analysis.

The simulation example describes an input-voltage monitor comprising a comparator that acts as a "power-good" block in a power-management IC. When the input voltage rises above a 13V enable threshold, the output voltage goes high and enables other circuit blocks. When the input voltage falls below a 10V disable threshold, the output voltage goes low and disables other circuits. The difference between the enable and the disable thresholds—that is, 3V—defines the hysteresis voltage. A worst-case simulation of the circuit must account for variations in characteristics of NPN and PNP transistors, base resistors, and polysilicon resistors in the circuit. Each device's characteristics can fall at either the low or the high end of the process specifications and thus produce 16 combinations.

Row 1 of the table displays the measurement expression and results for the enable-voltage threshold. When the output voltage first crosses 4.5V (one-half the simulated circuit's 9V power-supply bus voltage) on the positive slope, the simulation records the value of the input voltage as the enable-threshold voltage, and row 2 measures the disable-threshold voltage. Rows 3 and 4 measure the enable- and disable-threshold voltages by another method: When the output voltage passes 50% of the full-scale value for the first and second times, PSpice measures the value of the input voltage. Row 5 calculates the hysteresis voltage.