High-impedance buffer amplifier's input includes ESD protection

Certain measurement applications, such as for pH (acidity) and bio-potentials, require a high-impedance buffer amplifier. Although several semiconductor manufacturers offer amplifier ICs featuring low bias and offset-input currents, attaching a sensor cable to an amplifier circuit can inflict damage from ESD (electrostatic discharge). Figure 1 shows one unsatisfactory approach to ESD protection. Resistor R₁ limits an ESD event's discharge current, and diodes D_1A and D_1B clamp amplifier IC₁'s input to its power-supply rails. Unfortunately, when shunting a pH sensor's 400-MΩ input impedance, even low-leakage diodes, such as Fairchild Semiconductor's MMBD-1503A, introduce significant offset voltages.

The circuit in Figure 2 offers an alternative approach. An Analog Devices low-input-bias, low-offset-current AD8603 amplifier, IC₁, serves as a unity-gain input buffer. For any normal input, the circuit's output voltage, V_OUT, equals its input voltage, V_IN. Thus, the voltage across ESD-protection diode D_1A or D_1B approaches 0V, and neither diode's leakage current affects the sensor's output signal. Depending on the polarity of an ESD event you apply to the circuit's input connector, its high-voltage spike discharges through diode D_1A or D_1B into the positive or the negative power-supply rail. Capacitor C₁ acts as an intermediate "charge reservoir" that slows the ESD spike's rate of rise and protects IC₁'s output stage from latching until diode D_2A or D_2B begins diversion of the ESD transient into the positive or the negative supply rail. In effect, C₁ compensates for D₁'s parasitic capacitance. Resistor R₃ allows IC₁ to drive the capacitive load that C₁ presents without going into oscillation.

During an ESD event, both D₁ and D₂ can conduct, but the voltage at V_IN exceeds the power-supply-rail voltage by only two forward-biased diode voltage drops. Resistors R₁ and R₂ limit the amplifier input's currents below the manufacturer's recommended 5-mA maximum rating.

When packaging the circuit, pay special attention to the pc board's layout. Imperfections in the board's dielectric properties can provide parasitic-leakage-current paths. Adding copper traces on both sides of the board to form guard rings around the circuit's high-impedance nodes diverts leakage currents (Figure 3).