IDF China: Intel details new chips, initiatives

By Ann Steffora Mutschler, Senior Editor -- 4/17/2007

At the Intel Developer Forum (IDF) being held this week in Beijing, executives from Intel Corp. detailed new products, technology and initiatives meant to allow more security, ease of use and responsiveness between the Internet, computers and consumer electronics devices.

In a keynote address, Justin R. Rattner, CTO of Intel told attendees, “Welcome to the era of multicore, an era in which all of our computing capabilities will multiply our own personal capabilities. This Beijing developer forum will show how our multiple innovations go hand in hand with evolutions in social networking, PC and TV entertainment, online commerce and other growing demands on the Internet. Today, Intel is delivering a breadth of multicore processors worldwide and a product roadmap providing the incredible performance boost and energy efficiency needed to put the consumer more in control of the information age.”

This is the first time the IDF is being held in Beijing. Not coincidently, Intel announced last month that it plans to invest $2.5 billion to build China’s first 300-mm wafer fab in the city of Dalian.

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Against the backdrop of the company’s 45-nm Hi-k metal gate silicon technology and how Intel expects it to spur innovation and growth, Intel executives at the IDF also discussed performance details for its next-generation “Penryn” processors

For Penryn use in desktop PCs, Intel expects increases of approximately 15 percent for imaging-related applications; 25 percent for 3-D rendering; more than 40 percent for gaming; and more than 40 percent faster video encoding with Intel SSE4 optimized video encoders.

Intel noted that the indicators for these increases were based on pre-production 45-nm Hi-k Intel quad core processor running at 3.33-gigahertz with a 1333-megahertz front side bus (FSB) and 12-MB cache versus an Intel Core 2 Extreme processor QX6800 introduced last week at 2.93-gigahertz with 1066 FSB and 8-MB cache.

In the high-performance computing (HPC) and workstation segment Intel is expecting gains with Penryn up to approximately 45 percent for bandwidth-intensive applications; and a 25 percent increase for servers using Java. These indicators were derived from pre-production 45-nm Hi-k Intel Xeon processors with 1600-megahertz FSB for workstation and HPC, and a 1333-megahertz FSB for servers versus today’s quad-core Intel Xeon X5355 processors.

Next, Intel said it has begun planning products based on a highly parallel, IA-based programmable architecture codenamed “Larrabee,” meant to be easily programmable using existing software tools, and designed to scale to trillions of floating point operations per second (teraflops). The Larrabee architecture is expected to include enhancements to accelerate applications such as scientific computing, recognition, mining, synthesis, visualization, financial analytics and health applications.

And aimed at the server market, the company noted plans for its “QuickAssist Technology,” meant to optimize the use of accelerators in servers for increased performance of a single function, such as security encryption or financial computation, while reducing power consumption. This technology includes support for acceleration using IA-based multi-core processors and third party accelerators working together in Intel-based servers, and developing new integrated accelerators inside the IA-based processor itself, the company explained.

Further, the company unveiled what it said will be a family of enterprise-class SoC products, codenamed, “Tolapai,” which integrate key system components into a single processor. A Tolapai processor due out next year is expected to reduce the chip size by up to 45 percent and reduce power consumption by approximately 20 percent compared to a standard four-chip design, while improving throughput performance and processor efficiency, Intel explained. Tolapai is expected to include the QuickAssist Integrated Accelerator technology.

In other product plans, Intel outlined “Caneland,” aimed at high-end multi-processor servers, which are quad- and dual-core Intel Xeon processor 7300 series, and are expected out in Q3 in 80- and 50-watt versions for blade servers. These new servers are meant to complete Intel’s transition to its Intel Core microarchitecture for Xeon processors. Sun Microsystems demonstrated its Solaris operating system running on an Intel Xeon 5100 series processor-based system using Intel Dynamic Power technology, a new capability focused on reducing the power required for a memory subsystem.

To bolster PC security and manageability, Intel said it will introduce its vPro processor technology, codenamed “Weybridge,” in the second half of the year that uses the new Intel 3 Series Chipset family, formerly codenamed “Bear Lake.” This will follow the launch of Intel’s Centrino Pro processor technology, meant to bring the business-centric features of vPro systems to notebooks for the first time.

Also, Microsoft demonstrated Windows Server code name "Longhorn" and two complementary technologies, Windows Server Core, and its new hypervisor-based virtualization solution, Windows Server virtualization, running on the Intel quad-core Xeon processors. The integrated platform combination demonstrates running up to 8 core virtual machines with "hot add" features and is aimed at delivering increased efficiency and uptime.

In the consumer electronics realm, Eric Kim, senior VP and general manager of Intel’s Digital Home Group, said at the IDF that the company is working on products and technologies that provide consumers with greater control, choice, clarity and community – the “4C’s” – across computers and CE platforms spanning PCs, laptops, televisions, set-top-boxes and other networked media players.

Intel’s strategy is to deliver a common, unified IA-based processor foundation across PC and CE platforms with the Intel CE 2110 media processor (also announced at the IDF Monday), an SoC architecture for CE devices, to help manufacturers accelerate time to market for smarter, more cost-effective designs that provide necessary performance, flexibility and headroom. Intel said it plans to deliver its first CE-optimized IA-based SoC next year.

Intel also plans to deliver a number of desktop computer products later this year, including updates to its Intel Viiv processor technology roadmap, and a new high-end enthusiast and gaming platform codenamed “Skulltrail.”

Future generations of Intel Viiv processor technology will be based on the Intel 3 Series Chipset family arriving this quarter and delivering improved graphics support with features such as enhanced Intel Clear Video Technology and hardware support for Microsoft DX10 for smoother high-definition playback and 3D visuals. Intel 3 Series Chipsets also boost system performance with a faster 1333-megahertz FSB and support for DDR3 memory, PCI Express 2.0 and Intel Turbo Memory for application acceleration and faster boot times.

Finally, in his opening address, Rattner reiterated Intel’s goals for processor performance and energy efficiency noting that the company believes it can drive down power consumption by a factor of 10 for the ultra mobile computing segment by 2010.

Intel said it would also create future processors at teraflops speeds, and Rattner urged the industry to work together to take advantage of this raw processing power. The next stage of Intel’s tera-scale research will be around “stacked” memory on top of the 80-core research chip Intel demonstrated earlier this year.


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