MIPS introduces the 1-GHz 74K processor core

By Robert Cravotta, Technical Editor -- 5/22/2007

MIPS today extends its family of 32-bit cores with the 74K. The company's highest-performance, single-threaded, fully synthesizable core, the 74K is capable of achieving an operating frequency of greater than 1 GHz in a 65-nm general-purpose process.

The 74K's updated microarchitecture is compatible with the software and system interfaces of the 24K, 24KE, and 34K processors. The 74K's 17-stage asymmetric limited dual-issue (ALU and address generation) pipeline supports out-of-order instruction dispatch and completion (eight-instruction-wide window per pipeline) that can improve the performance and efficiency of existing binary code without a recompile. The branch-prediction logic includes three 256-entry branch-history tables and an eight-entry return-prediction stack.

The 74K implements the DSP ASE (application-specific extension) Revision 2, which is a superset of the DSP ASE Revision 1 and is implemented by the 24KE and 34K cores. The DSP ASE Revision 2 includes 27 new instructions that enable automatic compiler vectorization and that optimize video and image processing, VOIP, and Viterbi algorithms. The 74K includes support for L2 Cache with the MIPS SOC-it L2 Cache Controller.

The 74K core family consists of two members. The 74Kc is an integer core, and the 74Kf is an integer core with high-performance floating-point support that is fully compliant with the IEEE 754 specification. Both 74K cores support CorExtend, which allows designers to add their own proprietary instructions and tightly coupled hardware.

The 74K core family is available now for general licensing; the core deliverables include RTL, application notes, simulation test benches ,and EDA design flows for Magma, Cadence, and Synopsys. Software development and debug tools from MIPS include the Eclipse-based IDE for the MIPS SDE full GNU toolchain and SDE-Lite (available for free). Simulation support includes the full processor simulator MIPSsim and a bus-functional model. Hardware development tools include the Malta FPGA-based hardware development platform.

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