Apache offers product for IC-to-package power and EMI analysis

By Michael Santarini, Senior Editor -- 5/30/2007

Expanding on its RedHawk and Sidewinder IC-power-analysis tools and its Sahara-PTE on-chip thermal-analysis tools, Apache Design now is entering the system-analysis market with Sentinel, a new product that addresses system-level power integrity, I/O-SSO (input/output-simultaneous-switching-output), and EMI (electromagnetic-interference) challenges across ICs, packages, and, eventually, PCBs (printed-circuit boards). This week, the company announced the Sentinel-CPM (chip-power model) for chip-to-package power integrity and LC (inductance-capacitance)-resonance modeling; the Sentinel-SSO high-capacity I/O-subsystem-simulation tool for pad and package selection; and the Sentinel-EMI tool for simultaneously modeling EMI in IC cores and I/O. “Power and signal-integrity challenges do not stop just at the boundary of SOC [system on chip],” says Apache’s chief executive officer, Andrew Yang. “It goes through I/O and off-chip through the PCB, and it determines what package designers should use and what power pads they should allocate.”

Traditionally, separate groups design ICs, packages, and PCBs; as a result, each group tends to overdesign, which delays projects from reaching the market and adds cost. Over the last few years, EDA vendors, such as Cadence, Sigrity, and Rio Design Automation, have been offering IC-package and PCB co-design tools. Apache is one of the first companies to take on power issues in this domain.

Various cores in an IC generate noise that propagates to the I/O through the power-ground network in the form of voltage drop and ground bounce. This noise couples into the I/O and affects its performance and the quality of the signal. This coupling noise can also propagate to the package and PCB through power pads. “In I/O-interface design, you cannot simply ignore core noise coupling into the I/O,” says Yang. “But because of the size and complexity of today’s ICs, you cannot provide the switching activity of every gate and transistor in every core to the I/O.” To avoid this problem, I/O designers typically run a SPICE simulation of 16 I/Os and then multiply the result by 10 to derive the behavior of a full bank of I/O.

According to Yang, however, Apache has come up with a better way to accurately and simultaneously model the behavior of 256 or 512 I/Os and create a model that popular broadband-model generators—from vendors such as Ansoft, Sigrity, Optimal, and Fluent—can read.

To achieve this performance, Apache created the Sentinel-CPM generator. Designers feed the results of Apache’s RedHawk sign-off power-analysis tool into Sentinel-CPM, partition the design into blocks, and then use the tool to generate CPMs based on partitions in the chip design. A CPM is somewhat similar to an IBIS (I/O Buffer Information Specification) model in that it is package-independent and compact. However, IBIS models typically find use in performance modeling of a chip, whereas CPM also provides power and ground information. “A CPM has complete information of the on-die parasitic elements, such as power-ground resistance, and all the capacitance associated with the chip, including capacitance from transistors and decoupling capacitors from power and ground,” says Yang.

Apache employed a partitioning approach to help users choose the granularity at which they want to model their designs. He advises users of the Sentinel-CPM tool not to use the tool to create a single port model. ”In reality, chips have different switching in different locations, and, to truly model the behavior of the chip, you have to account for these spatial effects,” says Yang. The tool’s default is to create a model based on 64 ports, or partitions. Users can create 128-, 256-, or 32-port models. The higher granularity models are more complex and take longer to generate. In addition to RC (resistance-capacitance) information, each partition includes coupling or control sources that couple to every other partitioned block. The fully coupled, fully dynamic CPU uses full, piecewise, linear-current sources and can handle memory-switching IP (intellectual property) and analog- and digital-block switching. It also accounts for the dielectric effects of both resistance and capacitance.

Using RedHawk in a test run, a power-ground extraction of an IC with 40 million simulation nodes—that is, a transient simulation in a 20-nsec span with 10-psec time steps—took eight hours. After creating the CPM model, Apache linked the model with the same package for the full-chip dynamic simulation and ran it in a SPICE simulator. That run took 12 minutes—a two-orders-of-magnitude speedup. The company then compared a sampling of the CPM SPICE partitions’ waveforms with RedHawk waveforms and found them to be identical. Engineers can use the speedy models to link their packages to boards and to perform LC-resonance analysis, package prototyping, and noise budgeting.

To assist I/O and system designers with package and pad selection, the Sentinel-SSO I/O-subsystem simulator uses a CPM to model all noise sources and channels that impact the timing and signal integrity of the I/O subsystem. These sources include the I/O-power grid, on-die decoupling capacitance, and the chip’s core power model. It also models any off-chip noise channels from wideband package, or PCB models. The tool includes an embedded power-ground network-extraction engine, so it runs 10 times faster than “fully SPICE-accurate” competing approaches and has an I/O-bank capacity of 100, which is 10 times more banks than competing solutions, says Yang. The layout-based tool does not require users to generate SPICE netlists and link to an RC-extraction engine to run it.

Sentinel-SSO provides designers with better visibility into the I/O design and the ability to determine the correct ratio of power to signal pads. “Without this visibility, the I/O or system designer has to resort to overdesign using conservative ratios, such as 1-to-4,” says Yang. That constraint means that the designer must allocate a power pad for every fourth signal. As a result, as manufacturers scale down to 45-nm processes, pad and I/O resources will become scarce because of limited real estate. With SSO, designers can implement a 1-to-6 or even greater ratio, he says. With more accurate analysis, users can also more accurately pinpoint noise sources or power-ground noise and then use just the right number of decoupling capacitors on their PCBs, potentially reducing the overall amount of decapacitance they use on the board, reducing the costs of extra decapacitance use. Designers can also use the tool to analyze their overall timing budgets.

The Sentinel-EMI tool helps designers handle EMI problems. ”With emerging applications in embedded and automotive systems, you don’t want your chip to create EMI and disrupt the chips around it,” says Yang. ”One of the biggest challenges is to correctly and comprehensively model the switching noise. It can propagate through the IC power pads, through the I/O to the off-chip signal net, and then radiate like an antenna.” He notes that two factors that cause EMI are I/O, or simultaneous, switching and core switching, in which a signal propagates through a power pad and makes it to a trace on the PCB. A third source occurs when I/Os are not switching but can generate EMI. Internal clock power and switching can cause noise that propagates through the coupling capacitors between the ground and the I/O, to pads, and off-chip. The nose then radiates outward.

Yang says that Sentinel-EMI accurately models all three EMI sources, and the company is working with several commercial EMI-tool vendors to ensure that their tools can read the models. The next step is to extend the Sentinel flow to include PCB analysis in the power mix, but those tools are still in the prototyping phase. The price for the Sentinel product line starts at $100,000 for either Sentinel-CPM or Sentinel-SSO. Sentinel-EMI sells for $50,000 and requires Sentinel-CPM. Sentinel-CPM is available now, Sentinel-SSO will be available in the third quarter of this year, and Sentinel-EMI will be available by year-end.

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