193-nm double patterning immersion, EUV options for next-gen litho

By Ann Steffora Mutschler, Senior Editor -- 5/22/2008

During the Sematech Litho Forum held last week in Bolton Landing, NY, semiconductor manufacturers, equipment suppliers and researchers gathered to evaluate the progress of the various technology options and guide critical thinking on extending the semiconductor lithography roadmap.

For more from EDN.com on EUV, see:  What say you on semi equipment, process timing? Is self-aligned double patterning cost-effective for 32 to 22 nm scaling? Double-patterning to the rescue, but with strings attached SPIE: the year of EUV—or maybe not IBM, AMD demo first 'full field' EUV test chip IMEC, Powerchip expand sub-32-nm CMOS research

During the forum, options were presented for the current status and projected plans of various lithographic technology options for the 32-nm half-pitch generation and beyond including 193-nm high-index immersion, double patterning, and extreme ultraviolet lithography (EUVL), as well as alternative technologies such as nanoimprint and maskless, Sematech said.

Michael Lercel, Sematech’s lithography director and conference chair said the feedback Sematech has received from the industry is that although the technical challenges of lithography are increasing, the business pressure to keep scaling to smaller device feature sizes remains very strong, especially for memory companies.

A survey conducted during the forum showed that a technology option for nominal 32-nm half-pitch in 2013 is double patterning using 193-nm dry or water-based immersion lithography tools, and also that participants believe EUVL is still considered the most likely next-generation lithography for nominal 22-nm half-pitch node.

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