Intel marches once again into microcontroller market

By Ron Wilson, Executive Editor -- 7/23/2008

Intel today announced its re-entry into the high-end, application-specific microcontroller market with a line of Pentium- and Atom-based chips known as the 80579 family. Combining a single processor-core complex, North- and South-bridge functions, application-specific peripheral blocks, and in some cases an application accelerator, the chips in the family will create an x86-instruction-set alternative to the rainbow of ARM- and MIPS-based SOCs, at least for systems that can tolerate the considerable power and memory footprint involved.

There are more than 15 designs underway in the family, according to Doug Davis, Intel vice president and general manager. Each of these chips will target a specific application area, although Intel was somewhat reticent about identifying these areas. They appear to include VOIP controllers, Internet-connected appliances, embedded-computing applications, and eventually mobile Internet devices.

Gadi Singer, Intel vice president and general manager, touted the advantages of the integrated chips as a reduction in footprint from four packages to one, and a reduction in power of about one-third, compared with the same functionality implemented using existing Intel microprocessors, core logic, and additional chips. Note that these comparisons are just between the one- and four-chip implementations, not system-level comparisons that would include displays, peripherals, and memory. Perhaps significantly, Intel did not make performance, energy, or cost comparisons against any SOC products currently in the market based on other CPU architectures.

Davis said that the differential advantage the family would have over the sea of existing ARM-based SOCs from other vendors would be the x86 instruction set. Admitting that in the applications Intel had in mind this really meant embedded x86 operating software and applications, not desktop compatibility, Davis argued that there is a very large body of software in the x86 world that could exploit this new level of integration.

This is not the first time that Intel has attacked the integrated-processor market. Arguably, the company helped pioneer the area with its 8- and 16-bit microcontroller products in the previous century. But Intel abandoned microcontrollers to focus on x86 processors. Then the company came back to the microcontroller market with XScale CPU products a few years ago, only to depart the market again. This time is different, though, Singer insisted, because now the effort is built around x86-architecture processor cores rather than something else.

The effort will involve dozens of non-CPU IP blocks, Singer said, ranging from application-specific peripheral interfaces to graphics engines and video codecs. Some of these cores Intel will develop internally, Singer said, while others will be licensed from third parties and brought into Intel's design flow. "A critical element of our strategy is the flexibility of this approach," Singer said. "We have established a platform from which the cost of development for any particular variant is quite low."

Singer described the target-market area as a growing gap that has opened up between the flexible, power-hungry, and tethered personal computer on one end, and the mobile, battery-powered but low-computing-power mobile device market on the other end. Intel sees this gap as full of applications characterized by Internet connectivity, significant computing loads, and the need for—or at least the ability to benefit from—x86 code compatibility.

Davis gave only scattered data points about products within that space. Eight are being announced today, but they were not listed in the presentation. In general, the family includes chips using Pentium-M4 cores. Other families will in the future include Atom-based chips as well. The accelerator used in some members of the first family is a simplified RISC engine derived from architectural work Intel did in its Network Processor group some years ago, according to product manager Ed Pullin. In at least one case that core includes, in addition to the RISC engine, a hardware block specifically for encryption/decryption acceleration.

Intel's approach to acceleration engines in the new family is consistent with the framework previously established for hardware acceleration using, for example, FPGA accelerators on the front-side bus of Xeon processors, Davis explained. The intent is to make the accelerators, which are actually programmable devices, appear to be fixed hardware supported by device drivers. An application programmer, in principle, should not have to be concerned even with whether a particular chip has an accelerator or not: the application-level source would be the same, but additional system driver code linked in at compile time would either provide communications to the accelerator or a software emulation of the accelerator.

Davis said family members will range in power consumption from about 11W for a simple chip running at 600 MHz to about 21W for a more powerful chip with an accelerator. "The power savings compared to the four-chip implementations come primarily from savings in inter-chip signaling," Davis said. The eight chips announced today are implemented in a 90-nm process, and all are single-die devices. Intel does not contemplate using multidie or system-in-package techniques in this family, at least in the near future.

While he declined to give specific prices, Davis said that in unspecified volumes prices would range from around $40 each for a low-end, 500-MHz chip without an accelerator to around $95 each for a high-end chip with an on-chip accelerator. Singer added that in the future, presumably after Atom-based versions become available and process migration works its wonders, low-end devices could sell in the $2 to $3 range.

Intel claims to already have 50 customers for the new family, including some who have had chips for more than a year.

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