A few years ago when EDA startup Calypto introduced its SLEC (sequential logic equivalence checker) tool, I thought it was a very promising technology. One of the biggest issues in ESL modeling is ensuring that the block or design you are modeling at an ES level (in C++, SystemC or ANSI C, etc.) is functionally the same as the RT level implementations. Not having a way to tell if they are the same is a bit of a roadblock. Also, for ESL synthesis to reach its full potential, designers would need a way to ensure the ESL output of a given synthesis tool was functionally the same as the RTL version and vice versa.

When Calypto introduced SLEC a few years ago, it showed great promise in solving those problems. The tool claimed to check that models and synthesis output at different levels were essentially the same. The tool initially got a lot of attention but then kind of slid into obscurity.

But this week Calypto announced that its SLEC System-HLS for verification of high-level synthesis (HLS) output now supports both Mentor Graphics Catapult C ANSI C synthesis tool as well as Forte’s Cynthesizer SystemC synthesis tool.

Concurrently, Mentor also announced that its customers, most notably STARC, are seeing great success with the combined use of Catapult C and SLEC.