Electronic Design has a nice Idea for Design where a fellow puts a diode in the source leg of the JFET to raise the bias point by a diode drop. He just ties the gate to common, so it is a normally self-biased JFET except the bias has been moved from IDSS to a point where the diode drop adds in 0.7 volts or so and puts the Vgs to  –0.7 volts.