The TC358730XBG high-speed MIPI (mobile-industry-processor-interface) display buffer/controller simplifies the design of mobile phones and provides VGA-display resolutions. Features include 8 Mbits of embedded DRAM, single-buffer operation for images as high as VGA resolution, and automatic double buffering when handling two images with resolutions as high as HVGA. The device accepts high-speed, burst-access data transfers from the host, which enter the low-power sleep mode as the controller updates the connected LCD at the required frame rate, using low-leakage process technology, as well as sleep and deep-sleep modes. Image-processing functions include pixel-doubling to scale lower resolution images to higher resolution displays, rotation of incoming images, and the mirroring of incoming and outgoing images. The vendor’s Magic Square algorithm provides image-quality-enhancement capabilities, allowing an RGB666 18-bit LCD panel to produce picture quality equivalent to an RGB888 24-bit LCD panel with as many as 16 million colors. The buffer/controller supports three host-interface standards, a primary LCD, and a secondary LCD through DBI Type C. The device provides 1.8V for the I/O, 2.3 to 2.9V for the embedded DRAM, 1.2V for the internal-core operation, and 1.8V for the external-core operation. Measuring 5×5×1 mm in a BGA-64 package, the TC358730XBG is available for $20 to $25 (10,000).

Toshiba America Electronic Components, www.toshiba.com